c11c882345
* Boilerplat fixed * Standardized vcsim variables in all modules Signed-off-by: Abhijeet Kasurde <akasurde@redhat.com> |
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.. | ||
main.yml | ||
poweroff_d1_c1_f0.yml | ||
poweroff_d1_c1_f1.yml |
c11c882345
* Boilerplat fixed * Standardized vcsim variables in all modules Signed-off-by: Abhijeet Kasurde <akasurde@redhat.com> |
||
---|---|---|
.. | ||
main.yml | ||
poweroff_d1_c1_f0.yml | ||
poweroff_d1_c1_f1.yml |