RK3326: Fix OGA BA internal Wifi on 6.7
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brooksytech
fewtarius
parent
547faef7f9
commit
00f48d2d6a
1 changed files with 0 additions and 289 deletions
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@ -1,289 +0,0 @@
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diff -rupN linux.orig/drivers/devfreq/Kconfig linux/drivers/devfreq/Kconfig
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--- linux.orig/drivers/devfreq/Kconfig 2024-01-10 19:42:04.697152003 +0000
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+++ linux/drivers/devfreq/Kconfig 2024-01-10 20:09:49.575772091 +0000
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@@ -141,6 +141,12 @@ config ARM_RK3399_DMC_DEVFREQ
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It sets the frequency for the memory controller and reads the usage counts
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from hardware.
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+config ARM_ROCKCHIP_BUS_DEVFREQ
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+ tristate "rockchip bus"
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+ depends on ARCH_ROCKCHIP
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+ help
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+ rk bus driver
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+
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config ARM_SUN8I_A33_MBUS_DEVFREQ
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tristate "sun8i/sun50i MBUS DEVFREQ Driver"
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depends on ARCH_SUNXI || COMPILE_TEST
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diff -rupN linux.orig/drivers/devfreq/Makefile linux/drivers/devfreq/Makefile
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--- linux.orig/drivers/devfreq/Makefile 2024-01-10 19:42:04.697152003 +0000
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+++ linux/drivers/devfreq/Makefile 2024-01-10 20:09:49.575772091 +0000
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@@ -13,6 +13,7 @@ obj-$(CONFIG_ARM_IMX_BUS_DEVFREQ) += imx
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obj-$(CONFIG_ARM_IMX8M_DDRC_DEVFREQ) += imx8m-ddrc.o
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obj-$(CONFIG_ARM_MEDIATEK_CCI_DEVFREQ) += mtk-cci-devfreq.o
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obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += rk3399_dmc.o
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+obj-$(CONFIG_ARM_ROCKCHIP_BUS_DEVFREQ) += rockchip_bus.o
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obj-$(CONFIG_ARM_SUN8I_A33_MBUS_DEVFREQ) += sun8i-a33-mbus.o
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obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra30-devfreq.o
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diff -rupN linux.orig/drivers/devfreq/rockchip_bus.c linux/drivers/devfreq/rockchip_bus.c
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--- linux.orig/drivers/devfreq/rockchip_bus.c 1970-01-01 00:00:00.000000000 +0000
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+++ linux/drivers/devfreq/rockchip_bus.c 2024-01-10 20:09:49.575772091 +0000
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@@ -0,0 +1,258 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * Copyright (c) 2018, Fuzhou Rockchip Electronics Co., Ltd.
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+ * Author: Tony Xie <tony.xie@rock-chips.com>
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+ */
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+
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+#include <linux/arm-smccc.h>
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+#include <linux/clk.h>
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+#include <linux/cpufreq.h>
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+#include <linux/delay.h>
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+#include <linux/devfreq.h>
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+#include <linux/module.h>
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+#include <linux/of.h>
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+#include <linux/pm_opp.h>
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+#include <linux/platform_device.h>
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+#include <linux/regulator/consumer.h>
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+#include <linux/slab.h>
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+#include <linux/string.h>
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+
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+#define CLUSTER0 0
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+#define CLUSTER1 1
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+#define MAX_CLUSTERS 2
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+
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+#define to_rockchip_bus_clk_nb(nb) \
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+ container_of(nb, struct rockchip_bus, clk_nb)
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+#define to_rockchip_bus_cpufreq_nb(nb) \
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+ container_of(nb, struct rockchip_bus, cpufreq_nb)
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+
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+struct busfreq_table {
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+ unsigned long freq;
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+ unsigned long volt;
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+};
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+
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+struct rockchip_bus {
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+ struct device *dev;
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+ struct regulator *regulator;
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+ struct clk *clk;
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+ struct notifier_block clk_nb;
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+ struct notifier_block cpufreq_nb;
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+ struct busfreq_table *freq_table;
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+
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+ unsigned int max_state;
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+
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+ unsigned long cur_volt;
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+ unsigned long cur_rate;
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+
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+ /*
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+ * Busfreq-policy-cpufreq:
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+ * If the cpu frequency of two clusters are both less than or equal to
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+ * cpu_high_freq, change bus rate to low_rate, otherwise change it to
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+ * high_rate.
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+ */
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+ unsigned long high_rate;
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+ unsigned long low_rate;
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+ unsigned int cpu_high_freq;
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+ unsigned int cpu_freq[MAX_CLUSTERS];
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+};
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+
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+static int rockchip_bus_set_freq_table(struct rockchip_bus *bus)
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+{
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+ struct device *dev = bus->dev;
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+ struct dev_pm_opp *opp;
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+ unsigned long freq;
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+ int i, count;
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+
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+ count = dev_pm_opp_get_opp_count(dev);
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+ if (count <= 0)
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+ return -EINVAL;
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+
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+ bus->max_state = count;
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+ bus->freq_table = devm_kcalloc(dev,
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+ bus->max_state,
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+ sizeof(*bus->freq_table),
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+ GFP_KERNEL);
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+ if (!bus->freq_table) {
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+ bus->max_state = 0;
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+ return -ENOMEM;
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+ }
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+
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+ for (i = 0, freq = 0; i < bus->max_state; i++, freq++) {
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+ opp = dev_pm_opp_find_freq_ceil(dev, &freq);
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+ if (IS_ERR(opp)) {
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+ devm_kfree(dev, bus->freq_table);
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+ bus->max_state = 0;
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+ return PTR_ERR(opp);
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+ }
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+ bus->freq_table[i].volt = dev_pm_opp_get_voltage(opp);
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+ bus->freq_table[i].freq = freq;
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+ dev_pm_opp_put(opp);
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+ }
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+
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+ return 0;
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+}
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+
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+static int rockchip_bus_power_control_init(struct rockchip_bus *bus)
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+{
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+ struct device *dev = bus->dev;
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+ int ret = 0;
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+
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+ bus->clk = devm_clk_get(dev, "bus");
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+ if (IS_ERR(bus->clk)) {
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+ dev_err(dev, "failed to get bus clock\n");
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+ return PTR_ERR(bus->clk);
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+ }
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+
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+ bus->regulator = devm_regulator_get(dev, "bus");
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+ if (IS_ERR(bus->regulator)) {
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+ dev_err(dev, "failed to get bus regulator\n");
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+ return PTR_ERR(bus->regulator);
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+ }
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+
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+ ret = dev_pm_opp_of_add_table(dev);
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+ if (ret < 0) {
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+ dev_err(dev, "failed to get OPP table\n");
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+ return ret;
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+ }
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+
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+ ret = rockchip_bus_set_freq_table(bus);
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+ if (ret < 0) {
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+ dev_err(dev, "failed to set bus freq table\n");
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+ return ret;
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+ }
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+
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+ return 0;
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+}
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+
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+static int rockchip_bus_clkfreq_target(struct device *dev, unsigned long freq)
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+{
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+ struct rockchip_bus *bus = dev_get_drvdata(dev);
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+ unsigned long target_volt = bus->freq_table[bus->max_state - 1].volt;
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+ int i;
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+
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+ for (i = 0; i < bus->max_state; i++) {
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+ if (freq <= bus->freq_table[i].freq) {
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+ target_volt = bus->freq_table[i].volt;
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+ break;
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+ }
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+ }
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+
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+ printk("AAA target_volt: %lu\n", target_volt);
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+
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+ if (bus->cur_volt != target_volt) {
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+ if (regulator_set_voltage(bus->regulator, target_volt,
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+ INT_MAX)) {
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+ dev_err(dev, "failed to set voltage %lu uV\n",
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+ target_volt);
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+ return -EINVAL;
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+ }
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+ bus->cur_volt = target_volt;
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+ }
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+
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+ return 0;
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+}
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+
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+static int rockchip_bus_clk_notifier(struct notifier_block *nb,
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+ unsigned long event, void *data)
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+{
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+ struct clk_notifier_data *ndata = data;
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+ struct rockchip_bus *bus = to_rockchip_bus_clk_nb(nb);
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+ int ret = 0;
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+
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+ printk("AAA event %lu, old_rate %lu, new_rate: %lu\n",
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+ event, ndata->old_rate, ndata->new_rate);
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+
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+ switch (event) {
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+ case PRE_RATE_CHANGE:
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+ if (ndata->new_rate > ndata->old_rate)
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+ ret = rockchip_bus_clkfreq_target(bus->dev,
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+ ndata->new_rate);
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+ break;
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+ case POST_RATE_CHANGE:
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+ if (ndata->new_rate < ndata->old_rate)
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+ ret = rockchip_bus_clkfreq_target(bus->dev,
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+ ndata->new_rate);
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+ break;
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+ case ABORT_RATE_CHANGE:
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+ if (ndata->new_rate > ndata->old_rate)
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+ ret = rockchip_bus_clkfreq_target(bus->dev,
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+ ndata->old_rate);
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+ break;
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+ default:
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+ break;
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+ }
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+
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+ return notifier_from_errno(ret);
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+}
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+
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+static int rockchip_bus_clkfreq(struct rockchip_bus *bus)
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+{
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+ struct device *dev = bus->dev;
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+ unsigned long init_rate;
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+ int ret = 0;
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+
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+ ret = rockchip_bus_power_control_init(bus);
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+ if (ret) {
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+ dev_err(dev, "failed to init power control\n");
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+ return ret;
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+ }
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+
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+ init_rate = clk_get_rate(bus->clk);
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+ printk("init rate %d", init_rate);
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+ ret = rockchip_bus_clkfreq_target(dev, init_rate);
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+ if (ret)
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+ return ret;
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+
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+ bus->clk_nb.notifier_call = rockchip_bus_clk_notifier;
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+ ret = clk_notifier_register(bus->clk, &bus->clk_nb);
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+ if (ret) {
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+ dev_err(dev, "failed to register clock notifier\n");
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+ return ret;
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+ }
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+
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+ return 0;
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+}
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+
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+static const struct of_device_id rockchip_busfreq_of_match[] = {
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+ { .compatible = "rockchip,px30-bus", },
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+ { .compatible = "rockchip,rk1808-bus", },
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+ { .compatible = "rockchip,rk3288-bus", },
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+ { .compatible = "rockchip,rk3368-bus", },
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+ { .compatible = "rockchip,rk3399-bus", },
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+ { .compatible = "rockchip,rv1126-bus", },
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+ { },
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+};
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+
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+MODULE_DEVICE_TABLE(of, rockchip_busfreq_of_match);
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+
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+static int rockchip_busfreq_probe(struct platform_device *pdev)
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+{
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+ struct device *dev = &pdev->dev;
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+ struct device_node *np = dev->of_node;
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+ struct rockchip_bus *bus;
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+ const char *policy_name;
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+ int ret = 0;
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+
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+ bus = devm_kzalloc(dev, sizeof(*bus), GFP_KERNEL);
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+ if (!bus)
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+ return -ENOMEM;
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+ bus->dev = dev;
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+ platform_set_drvdata(pdev, bus);
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+
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+ printk("asdfsadfsadffasdafsdhjfsdakasdfjfjasdklsfadkljsdfajklfsadjklfasdjklhasfdhjklafsdhkjsfdajkhfasdk");
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+ return rockchip_bus_clkfreq(bus);
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+}
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+
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+static struct platform_driver rockchip_busfreq_driver = {
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+ .probe = rockchip_busfreq_probe,
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+ .driver = {
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+ .name = "rockchip-busfreq",
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+ .of_match_table = rockchip_busfreq_of_match,
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+ },
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+};
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+
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+module_platform_driver(rockchip_busfreq_driver);
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+
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+MODULE_LICENSE("GPL v2");
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+MODULE_AUTHOR("Tony Xie <tony.xie@rock-chips.com>");
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+MODULE_DESCRIPTION("rockchip busfreq driver with devfreq framework");
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