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Ace fix DMC clock panic

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brooksytech 2024-03-07 18:39:27 +00:00
parent 2a06ba0b9f
commit 0fdcb4aad8
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2 changed files with 131 additions and 5 deletions
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10
projects/Rockchip/devices/RK3588-ACE/linux/linux.aarch64.conf
View file

@ -574,15 +574,15 @@ CONFIG_CPU_FREQ_STAT=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE is not set
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
# CONFIG_CPU_FREQ_GOV_INTERACTIVE is not set

126
projects/Rockchip/patches/linux/RK3588-ACE/007-dmc-fixes.patch Normal file
View file

@ -0,0 +1,126 @@
diff -rupN linux.orig/drivers/devfreq/rockchip_dmc.c linux/drivers/devfreq/rockchip_dmc.c
--- linux.orig/drivers/devfreq/rockchip_dmc.c 2024-03-07 18:08:07.755017253 +0000
+++ linux/drivers/devfreq/rockchip_dmc.c 2024-03-07 18:09:55.570159077 +0000
@@ -141,6 +141,7 @@ struct rockchip_dmcfreq {
unsigned long hdmirx_rate;
unsigned long idle_rate;
unsigned long suspend_rate;
+ unsigned long deep_suspend_rate;
unsigned long reboot_rate;
unsigned long boost_rate;
unsigned long fixed_rate;
@@ -1996,6 +1997,12 @@ static __maybe_unused int rk3588_dmc_ini
if (of_property_read_u32(pdev->dev.of_node, "wait-mode", &ddr_psci_param->wait_mode))
ddr_psci_param->wait_mode = 0;
+ res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0, ROCKCHIP_SIP_CONFIG_DRAM_GET_STALL_TIME);
+ if (res.a0)
+ dev_err(dmcfreq->dev, "Current ATF unsupported get_stall_time\n");
+ else
+ dmcfreq->info.stall_time_ns = (unsigned int)res.a1;
+
dmcfreq->set_auto_self_refresh = rockchip_ddr_set_auto_self_refresh;
return 0;
@@ -2248,6 +2255,9 @@ static int rockchip_get_system_status_ra
case SYS_STATUS_SUSPEND:
dmcfreq->suspend_rate = freq * 1000;
break;
+ case SYS_STATUS_DEEP_SUSPEND:
+ dmcfreq->deep_suspend_rate = freq * 1000;
+ break;
case SYS_STATUS_VIDEO_1080P:
dmcfreq->video_1080p_rate = freq * 1000;
break;
@@ -2390,6 +2400,11 @@ static int rockchip_get_system_status_le
dmcfreq->suspend_rate = rockchip_freq_level_2_rate(dmcfreq, level);
dev_info(dmcfreq->dev, "suspend_rate = %ld\n", dmcfreq->suspend_rate);
break;
+ case SYS_STATUS_DEEP_SUSPEND:
+ dmcfreq->deep_suspend_rate = rockchip_freq_level_2_rate(dmcfreq, level);
+ dev_info(dmcfreq->dev, "deep_suspend_rate = %ld\n",
+ dmcfreq->deep_suspend_rate);
+ break;
case SYS_STATUS_VIDEO_1080P:
dmcfreq->video_1080p_rate = rockchip_freq_level_2_rate(dmcfreq, level);
dev_info(dmcfreq->dev, "video_1080p_rate = %ld\n",
@@ -3091,6 +3106,7 @@ static int rockchip_dmcfreq_add_devfreq(
devm_devfreq_register_opp_notifier(dev, devfreq);
devfreq->last_status.current_frequency = opp_rate;
+ devfreq->suspend_freq = dmcfreq->deep_suspend_rate;
reset_last_status(devfreq);
diff -rupN linux.orig/drivers/devfreq/rockchip_dmc_common.c linux/drivers/devfreq/rockchip_dmc_common.c
--- linux.orig/drivers/devfreq/rockchip_dmc_common.c 2024-03-07 18:08:07.755017253 +0000
+++ linux/drivers/devfreq/rockchip_dmc_common.c 2024-03-07 18:08:56.184571327 +0000
@@ -166,6 +166,15 @@ int rockchip_dmcfreq_vop_bandwidth_reque
}
EXPORT_SYMBOL(rockchip_dmcfreq_vop_bandwidth_request);
+unsigned int rockchip_dmcfreq_get_stall_time_ns(void)
+{
+ if (!common_info)
+ return 0;
+
+ return common_info->stall_time_ns;
+}
+EXPORT_SYMBOL(rockchip_dmcfreq_get_stall_time_ns);
+
MODULE_AUTHOR("Finley Xiao <finley.xiao@rock-chips.com>");
MODULE_DESCRIPTION("rockchip dmcfreq driver with devfreq framework");
MODULE_LICENSE("GPL v2");
diff -rupN linux.orig/include/dt-bindings/soc/rockchip-system-status.h linux/include/dt-bindings/soc/rockchip-system-status.h
--- linux.orig/include/dt-bindings/soc/rockchip-system-status.h 2024-03-07 18:08:10.371101216 +0000
+++ linux/include/dt-bindings/soc/rockchip-system-status.h 2024-03-07 18:09:55.570159077 +0000
@@ -37,6 +37,7 @@
#define SYS_STATUS_HDMIRX (1 << 18)
#define SYS_STATUS_VIDEO_SVEP (1 << 19)
#define SYS_STATUS_VIDEO_4K_60P (1 << 20)
+#define SYS_STATUS_DEEP_SUSPEND (1 << 21)
#define SYS_STATUS_VIDEO (SYS_STATUS_VIDEO_4K | \
SYS_STATUS_VIDEO_1080P | \
diff -rupN linux.orig/include/soc/rockchip/rockchip_dmc.h linux/include/soc/rockchip/rockchip_dmc.h
--- linux.orig/include/soc/rockchip/rockchip_dmc.h 2024-03-07 18:08:10.527106223 +0000
+++ linux/include/soc/rockchip/rockchip_dmc.h 2024-03-07 18:08:56.184571327 +0000
@@ -55,6 +55,7 @@ struct dmcfreq_common_info {
unsigned long vop_req_rate;
unsigned int read_latency;
unsigned int auto_freq_en;
+ unsigned int stall_time_ns;
bool is_msch_rl_work_started;
int (*set_msch_readlatency)(unsigned int rl);
};
@@ -76,6 +77,7 @@ int rockchip_dmcfreq_wait_complete(void)
int rockchip_dmcfreq_vop_bandwidth_init(struct dmcfreq_common_info *info);
int rockchip_dmcfreq_vop_bandwidth_request(struct dmcfreq_vop_info *vop_info);
void rockchip_dmcfreq_vop_bandwidth_update(struct dmcfreq_vop_info *vop_info);
+unsigned int rockchip_dmcfreq_get_stall_time_ns(void);
#else
static inline void rockchip_dmcfreq_lock(void)
{
@@ -118,6 +120,12 @@ static inline void
rockchip_dmcfreq_vop_bandwidth_init(struct dmcfreq_common_info *info)
{
}
+
+static inline unsigned int
+rockchip_dmcfreq_get_stall_time_ns(void)
+{
+ return 0;
+}
#endif
#endif
diff -rupN linux.orig/include/soc/rockchip/rockchip_sip.h linux/include/soc/rockchip/rockchip_sip.h
--- linux.orig/include/soc/rockchip/rockchip_sip.h 2024-03-07 18:08:10.531106351 +0000
+++ linux/include/soc/rockchip/rockchip_sip.h 2024-03-07 18:08:56.184571327 +0000
@@ -23,5 +23,6 @@
#define ROCKCHIP_SIP_CONFIG_DRAM_ECC 0x0d
#define ROCKCHIP_SIP_CONFIG_DRAM_GET_FREQ_INFO 0x0e
#define ROCKCHIP_SIP_CONFIG_DRAM_ADDRMAP_GET 0x10
+#define ROCKCHIP_SIP_CONFIG_DRAM_GET_STALL_TIME 0x11
#endif