715 lines
18 KiB
Diff
715 lines
18 KiB
Diff
From: Chris Morgan <macroalpha82@gmail.com>
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To: devicetree@vger.kernel.org
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Cc: linux-rockchip@lists.infradead.org, maccraft123mc@gmail.com,
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sebastian.reichel@collabora.com, heiko@sntech.de,
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conor+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
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robh+dt@kernel.org, Chris Morgan <macromorgan@hotmail.com>
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Subject: [PATCH 0/3] Add Support for Anbernic RG351V
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Date: Mon, 20 Nov 2023 17:01:28 -0600 [thread overview]
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Message-ID: <20231120230131.57705-1-macroalpha82@gmail.com> (raw)
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From: Chris Morgan <macromorgan@hotmail.com>
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Add support for the Anbernic RG351V handheld gaming console.
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Chris Morgan (3):
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dt-bindings: arm: rockchip: Add Anbernic RG351V
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arm64: dts: rockchip: Split RG351M from Odroid Go Advance
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arm64: dts: rockchip: Add Anbernic RG351V
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.../devicetree/bindings/arm/rockchip.yaml | 6 +-
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arch/arm64/boot/dts/rockchip/Makefile | 1 +
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.../dts/rockchip/rk3326-anbernic-rg351m.dts | 18 +-
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.../dts/rockchip/rk3326-anbernic-rg351m.dtsi | 478 ++++++++++++++++++
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.../dts/rockchip/rk3326-anbernic-rg351v.dts | 44 ++
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5 files changed, 529 insertions(+), 18 deletions(-)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351v.dts
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--
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2.34.1
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From: Chris Morgan <macroalpha82@gmail.com>
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To: devicetree@vger.kernel.org
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Cc: linux-rockchip@lists.infradead.org, maccraft123mc@gmail.com,
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sebastian.reichel@collabora.com, heiko@sntech.de,
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conor+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
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robh+dt@kernel.org, Chris Morgan <macromorgan@hotmail.com>
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Subject: [PATCH 1/3] dt-bindings: arm: rockchip: Add Anbernic RG351V
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Date: Mon, 20 Nov 2023 17:01:29 -0600 [thread overview]
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Message-ID: <20231120230131.57705-2-macroalpha82@gmail.com> (raw)
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In-Reply-To: <20231120230131.57705-1-macroalpha82@gmail.com>
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From: Chris Morgan <macromorgan@hotmail.com>
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The Anbernic RG351V is a portable gaming console from Anbernic with the
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RK3326 SoC.
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Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
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---
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Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++++--
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1 file changed, 4 insertions(+), 2 deletions(-)
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diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
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index 5f7c6c4aad8f..3786f901a1a7 100644
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--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
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+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
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@@ -30,9 +30,11 @@ properties:
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- const: amarula,vyasa-rk3288
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- const: rockchip,rk3288
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- - description: Anbernic RG351M
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+ - description: Anbernic RK3326 Handheld Gaming Console
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items:
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- - const: anbernic,rg351m
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+ - enum:
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+ - anbernic,rg351m
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+ - anbernic,rg351v
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- const: rockchip,rk3326
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- description: Anbernic RG353P
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--
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2.34.1
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From: Chris Morgan <macroalpha82@gmail.com>
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To: devicetree@vger.kernel.org
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Cc: linux-rockchip@lists.infradead.org, maccraft123mc@gmail.com,
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sebastian.reichel@collabora.com, heiko@sntech.de,
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conor+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
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robh+dt@kernel.org, Chris Morgan <macromorgan@hotmail.com>
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Subject: [PATCH 2/3] arm64: dts: rockchip: Split RG351M from Odroid Go Advance
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Date: Mon, 20 Nov 2023 17:01:30 -0600 [thread overview]
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Message-ID: <20231120230131.57705-3-macroalpha82@gmail.com> (raw)
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In-Reply-To: <20231120230131.57705-1-macroalpha82@gmail.com>
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From: Chris Morgan <macromorgan@hotmail.com>
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Split the RG351M into its own DTSI file. The RG351M, unlike the Odroid
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Go Advance, has no ADC joysticks, no GPIO buttons (except for volume
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on the RG351V), a PWM vibrator that interferes with an Odroid
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regulator, and different LEDs. Split the RG351M into a DTSI file
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that can then be imported into the DTS files for the RG351M and a
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new RG351V.
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Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
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---
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.../dts/rockchip/rk3326-anbernic-rg351m.dts | 18 +-
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.../dts/rockchip/rk3326-anbernic-rg351m.dtsi | 478 ++++++++++++++++++
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2 files changed, 480 insertions(+), 16 deletions(-)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi
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diff --git a/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dts b/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dts
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index ce318e05f0a6..f4d20f29c1b4 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dts
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@@ -6,30 +6,16 @@
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*/
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/dts-v1/;
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-#include "rk3326-odroid-go.dtsi"
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+#include "rk3326-anbernic-rg351m.dtsi"
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/ {
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model = "Anbernic RG351M";
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compatible = "anbernic,rg351m", "rockchip,rk3326";
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-
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- vibrator {
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- compatible = "pwm-vibrator";
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- pwms = <&pwm0 0 1000000 0>;
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- pwm-names = "enable";
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- };
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};
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-/delete-node/ &builtin_gamepad;
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-/delete-node/ &vcc_host; /* conflicts with pwm vibration motor */
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-
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&internal_display {
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compatible = "elida,kd35t133";
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iovcc-supply = <&vcc_lcd>;
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+ rotation = <270>;
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vdd-supply = <&vcc_lcd>;
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};
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-
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-&pwm0 {
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- status = "okay";
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-};
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-
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-/delete-node/ &rk817_charger;
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diff --git a/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi b/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi
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new file mode 100644
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index 000000000000..89e64647b4fa
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi
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@@ -0,0 +1,478 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2019 Hardkernel Co., Ltd
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+ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
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+ * Copyright (c) 2022 Maya Matuszczyk <maccraft123mc@gmail.com>
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+ */
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+
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+/dts-v1/;
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/input/input.h>
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+#include <dt-bindings/leds/common.h>
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+#include <dt-bindings/pinctrl/rockchip.h>
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+#include "rk3326.dtsi"
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+
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+/ {
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+ aliases {
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+ mmc0 = &sdmmc;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial2:115200n8";
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+ };
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+
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+ backlight: backlight {
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+ compatible = "pwm-backlight";
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+ power-supply = <&vcc_bl>;
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+ pwms = <&pwm1 0 25000 0>;
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+ };
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+
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+ /*
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+ * LED is a tri-state. Driven high it is red, driven low it is
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+ * green, and not driven at all (pin set to input) it is amber.
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+ * Additionally, there is a 2nd LED that is not controllable
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+ * that is on (red) when plugged in to power.
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+ */
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+ gpio_led: gpio-leds {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&led_pin>;
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+
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+ red_green_led: led-0 {
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+ color = <LED_COLOR_ID_RED>;
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+ gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
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+ function = LED_FUNCTION_CHARGING;
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+ };
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+ };
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+
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+ rk817-sound {
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+ compatible = "simple-audio-card";
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+ simple-audio-card,name = "rk817_int";
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+ simple-audio-card,format = "i2s";
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+ simple-audio-card,hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
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+ simple-audio-card,mclk-fs = <256>;
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+ simple-audio-card,widgets =
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+ "Microphone", "Mic Jack",
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+ "Headphone", "Headphones",
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+ "Speaker", "Speaker";
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+ simple-audio-card,routing =
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+ "MICL", "Mic Jack",
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+ "Headphones", "HPOL",
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+ "Headphones", "HPOR",
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+ "Speaker", "SPKO";
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+
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+ simple-audio-card,codec {
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+ sound-dai = <&rk817>;
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+ };
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+
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+ simple-audio-card,cpu {
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+ sound-dai = <&i2s1_2ch>;
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+ };
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+ };
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+
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+ vccsys: vccsys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v8_sys";
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+ regulator-always-on;
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+ regulator-min-microvolt = <3800000>;
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+ regulator-max-microvolt = <3800000>;
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+ };
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+
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+ vibrator {
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+ compatible = "pwm-vibrator";
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+ pwms = <&pwm0 0 1000000 0>;
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+ pwm-names = "enable";
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+ };
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+};
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+
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+&cpu0 {
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+ cpu-supply = <&vdd_arm>;
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+};
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+
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+&cpu1 {
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+ cpu-supply = <&vdd_arm>;
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+};
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+
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+&cpu2 {
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+ cpu-supply = <&vdd_arm>;
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+};
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+
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+&cpu3 {
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+ cpu-supply = <&vdd_arm>;
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+};
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+
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+&cru {
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+ assigned-clocks = <&cru PLL_NPLL>,
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+ <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
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+ <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>,
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+ <&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>;
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+
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+ assigned-clock-rates = <1188000000>,
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+ <200000000>, <200000000>,
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+ <150000000>, <150000000>,
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+ <100000000>, <200000000>;
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+};
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+
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+&display_subsystem {
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+ status = "okay";
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+};
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+
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+&dsi {
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+ status = "okay";
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+
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+ ports {
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+ mipi_out: port@1 {
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+ reg = <1>;
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+
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+ mipi_out_panel: endpoint {
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+ remote-endpoint = <&mipi_in_panel>;
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+ };
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+ };
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+ };
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+
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+ internal_display: panel@0 {
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+ reg = <0>;
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+ backlight = <&backlight>;
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+ reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
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+
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+ port {
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+ mipi_in_panel: endpoint {
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+ remote-endpoint = <&mipi_out_panel>;
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+ };
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+ };
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+ };
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+};
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+
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+&dsi_dphy {
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+ status = "okay";
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+};
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+
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+&gpu {
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+ mali-supply = <&vdd_logic>;
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+ status = "okay";
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+};
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+
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+&i2c0 {
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+ clock-frequency = <400000>;
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+ i2c-scl-falling-time-ns = <16>;
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+ i2c-scl-rising-time-ns = <280>;
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+ status = "okay";
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+
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+ rk817: pmic@20 {
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+ compatible = "rockchip,rk817";
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+ reg = <0x20>;
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+ #clock-cells = <1>;
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+ clock-names = "mclk";
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+ clock-output-names = "rk808-clkout1", "xin32k";
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+ clocks = <&cru SCLK_I2S1_OUT>;
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+ interrupt-parent = <&gpio0>;
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+ interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
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+ pinctrl-0 = <&pmic_int>, <&i2s1_2ch_mclk>;
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+ pinctrl-names = "default";
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+ #sound-dai-cells = <0>;
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+ wakeup-source;
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+
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+ vcc1-supply = <&vccsys>;
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+ vcc2-supply = <&vccsys>;
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+ vcc3-supply = <&vccsys>;
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+ vcc4-supply = <&vccsys>;
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+ vcc5-supply = <&vccsys>;
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+ vcc6-supply = <&vccsys>;
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+ vcc7-supply = <&vccsys>;
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+ vcc8-supply = <&vccsys>;
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+
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+ regulators {
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+ vdd_logic: DCDC_REG1 {
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-max-microvolt = <1150000>;
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+ regulator-min-microvolt = <950000>;
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+ regulator-name = "vdd_logic";
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <950000>;
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+ };
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+ };
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+
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+ vdd_arm: DCDC_REG2 {
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-min-microvolt = <950000>;
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+ regulator-name = "vdd_arm";
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ regulator-suspend-microvolt = <950000>;
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+ };
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+ };
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+
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+ vcc_ddr: DCDC_REG3 {
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-name = "vcc_ddr";
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ };
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+ };
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+
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+ vcc_3v3: DCDC_REG4 {
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-name = "vcc_3v3";
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ regulator-suspend-microvolt = <3300000>;
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+ };
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+ };
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+
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+ vcc_1v8: LDO_REG2 {
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-name = "vcc_1v8";
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1800000>;
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+ };
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+ };
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+
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+ vdd_1v0: LDO_REG3 {
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-max-microvolt = <1000000>;
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+ regulator-min-microvolt = <1000000>;
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+ regulator-name = "vdd_1v0";
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1000000>;
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+ };
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+ };
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+
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+ vcc3v3_pmu: LDO_REG4 {
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-name = "vcc3v3_pmu";
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <3300000>;
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+ };
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+ };
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+
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+ vccio_sd: LDO_REG5 {
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-name = "vccio_sd";
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <3300000>;
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+ };
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+ };
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+
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+ vcc_sd: LDO_REG6 {
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+ regulator-boot-on;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-name = "vcc_sd";
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <3300000>;
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+ };
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+ };
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+
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+ vcc_bl: LDO_REG7 {
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+ regulator-max-microvolt = <3300000>;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-name = "vcc_bl";
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ regulator-suspend-microvolt = <3300000>;
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+ };
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+ };
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+
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+ vcc_lcd: LDO_REG8 {
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+ regulator-max-microvolt = <2800000>;
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+ regulator-min-microvolt = <2800000>;
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+ regulator-name = "vcc_lcd";
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+
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+ regulator-state-mem {
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|
+ regulator-off-in-suspend;
|
|
+ regulator-suspend-microvolt = <2800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_wifi: LDO_REG9 {
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-name = "vcc_wifi";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ regulator-suspend-microvolt = <3300000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb_midu: BOOST {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <5400000>;
|
|
+ regulator-min-microvolt = <5000000>;
|
|
+ regulator-name = "usb_midu";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rk817_codec: codec {
|
|
+ rockchip,mic-in-differential;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2s1_2ch {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&io_domains {
|
|
+ vccio1-supply = <&vcc_3v3>;
|
|
+ vccio2-supply = <&vccio_sd>;
|
|
+ vccio3-supply = <&vcc_3v3>;
|
|
+ vccio4-supply = <&vcc_3v3>;
|
|
+ vccio5-supply = <&vcc_3v3>;
|
|
+ vccio6-supply = <&vcc_3v3>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pmu_io_domains {
|
|
+ pmuio1-supply = <&vcc3v3_pmu>;
|
|
+ pmuio2-supply = <&vcc3v3_pmu>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pwm0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pwm1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&saradc {
|
|
+ vref-supply = <&vcc_1v8>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdmmc {
|
|
+ cap-sd-highspeed;
|
|
+ card-detect-delay = <200>;
|
|
+ cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>;
|
|
+ sd-uhs-sdr12;
|
|
+ sd-uhs-sdr25;
|
|
+ sd-uhs-sdr50;
|
|
+ sd-uhs-sdr104;
|
|
+ vmmc-supply = <&vcc_sd>;
|
|
+ vqmmc-supply = <&vccio_sd>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sfc {
|
|
+ #address-cells = <1>;
|
|
+ pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus2>;
|
|
+ pinctrl-names = "default";
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ flash@0 {
|
|
+ compatible = "jedec,spi-nor";
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <108000000>;
|
|
+ spi-rx-bus-width = <2>;
|
|
+ spi-tx-bus-width = <1>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&tsadc {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&u2phy {
|
|
+ status = "okay";
|
|
+
|
|
+ u2phy_host: host-port {
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ u2phy_otg: otg-port {
|
|
+ status = "disabled";
|
|
+ };
|
|
+};
|
|
+
|
|
+&usb20_otg {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart2 {
|
|
+ pinctrl-0 = <&uart2m1_xfer>;
|
|
+ pinctrl-names = "default";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vopb {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vopb_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+ headphone {
|
|
+ hp_det: hp-det {
|
|
+ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ leds {
|
|
+ led_pin: led-pin {
|
|
+ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pmic {
|
|
+ dc_det: dc-det {
|
|
+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ pmic_int: pmic-int {
|
|
+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+
|
|
+ soc_slppin_gpio: soc_slppin_gpio {
|
|
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
|
|
+ };
|
|
+
|
|
+ soc_slppin_rst: soc_slppin_rst {
|
|
+ rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ soc_slppin_slp: soc_slppin_slp {
|
|
+ rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
--
|
|
2.34.1
|
|
|
|
From: Chris Morgan <macroalpha82@gmail.com>
|
|
To: devicetree@vger.kernel.org
|
|
Cc: linux-rockchip@lists.infradead.org, maccraft123mc@gmail.com,
|
|
sebastian.reichel@collabora.com, heiko@sntech.de,
|
|
conor+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
|
|
robh+dt@kernel.org, Chris Morgan <macromorgan@hotmail.com>
|
|
Subject: [PATCH 3/3] arm64: dts: rockchip: Add Anbernic RG351V
|
|
Date: Mon, 20 Nov 2023 17:01:31 -0600 [thread overview]
|
|
Message-ID: <20231120230131.57705-4-macroalpha82@gmail.com> (raw)
|
|
In-Reply-To: <20231120230131.57705-1-macroalpha82@gmail.com>
|
|
|
|
From: Chris Morgan <macromorgan@hotmail.com>
|
|
|
|
Add support for the Anbernic RG351V, which is a handheld gaming console
|
|
from Anbernic with an RK3326 SoC, a 640x480 LCD display, a single
|
|
analog joystick with several face buttons, two USB C ports, and
|
|
internal WiFi over USB. All hardware has been tested as working
|
|
except for the battery, which will require further modification to the
|
|
mainline rk817 battery driver before it can be used (the device was
|
|
built without a shunt resistor, and as such the battery cannot
|
|
measure current; only voltage).
|
|
|
|
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
|
|
---
|
|
arch/arm64/boot/dts/rockchip/Makefile | 1 +
|
|
.../dts/rockchip/rk3326-anbernic-rg351v.dts | 44 +++++++++++++++++++
|
|
2 files changed, 45 insertions(+)
|
|
create mode 100644 arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351v.dts
|
|
|
|
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
|
|
index a18f33bf0c0e..0ac27cf782d7 100644
|
|
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
|
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
|
@@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb
|
|
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-rock-pi-s.dtb
|
|
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb
|
|
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-anbernic-rg351m.dtb
|
|
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-anbernic-rg351v.dtb
|
|
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
|
|
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2-v11.dtb
|
|
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go3.dtb
|
|
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351v.dts b/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351v.dts
|
|
new file mode 100644
|
|
index 000000000000..c2f9b56ca5f9
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351v.dts
|
|
@@ -0,0 +1,44 @@
|
|
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
+
|
|
+/dts-v1/;
|
|
+#include "rk3326-anbernic-rg351m.dtsi"
|
|
+
|
|
+/ {
|
|
+ model = "Anbernic RG351V";
|
|
+ compatible = "anbernic,rg351v", "rockchip,rk3326";
|
|
+
|
|
+ gpio_keys_vol: gpio-keys-vol {
|
|
+ compatible = "gpio-keys";
|
|
+ autorepeat;
|
|
+
|
|
+ button-vol-down {
|
|
+ label = "VOLUMEDOWN";
|
|
+ linux,code = <KEY_VOLUMEDOWN>;
|
|
+ gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+
|
|
+ button-vol-up {
|
|
+ label = "VOLUMEUP";
|
|
+ linux,code = <KEY_VOLUMEUP>;
|
|
+ gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&internal_display {
|
|
+ compatible = "anbernic,rg351v-panel", "newvision,nv3051d";
|
|
+ vdd-supply = <&vcc_lcd>;
|
|
+};
|
|
+
|
|
+&io_domains {
|
|
+ vccio1-supply = <&vccio_sd>;
|
|
+};
|
|
+
|
|
+&vcc_sd {
|
|
+ regulator-max-microvolt = <3000000>;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+};
|
|
+
|
|
+&vccio_sd {
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+};
|
|
--
|
|
2.34.1
|