662 lines
15 KiB
Perl
662 lines
15 KiB
Perl
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#!/usr/bin/env perl
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# ====================================================================
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# Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
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# project. Rights for redistribution and usage in source and binary
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# forms are granted according to the OpenSSL license.
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# ====================================================================
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# "Teaser" Montgomery multiplication module for UltraSPARC. Why FPU?
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# Because unlike integer multiplier, which simply stalls whole CPU,
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# FPU is fully pipelined and can effectively emit 48 bit partial
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# product every cycle. Why not blended SPARC v9? One can argue that
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# making this module dependent on UltraSPARC VIS extension limits its
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# binary compatibility. Very well may be, but the simple fact is that
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# there is no known SPARC v9 implementation, which does not implement
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# VIS. Even brand new Fujitsu's SPARC64 V is equipped with VIS unit.
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# USI&II cores currently exhibit uniform 2x improvement [over pre-
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# bn_mul_mont codebase] for all key lengths and benchmarks. On USIII
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# performance improves few percents for shorter keys and worsens few
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# percents for longer keys. This's because USIII integer multiplier
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# is >3x faster than USI&II one, which is harder to match [but see
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# TODO list below]. It should also be noted that SPARC64 V features
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# out-of-order execution, which *might* mean that integer multiplier
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# is pipelined, which in turn *might* be impossible to match...
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#
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# TODO:
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# - complete 32-bit adaptation (requires universal changes to
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# BN_MONT_CTX and bn_mul_mont prototype, but nothing really
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# unmanagable:-);
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# - modulo-schedule inner loop for better performance (on in-order
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# execution core such as UltraSPARC this shall result in further
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# noticeable(!) improvement);
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# - dedicated squaring procedure[?];
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$fname="bn_mul_mont";
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$bits=32;
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for (@ARGV) {
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$bits=64 if (/\-m64/ || /\-xarch\=v9/);
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$vis=1 if (/\-mcpu=ultra/ || /\-xarch\=v[9|8plus]\S/);
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}
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if (!$vis || $bits==32) { # 32-bit is not supported just yet...
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print<<___;
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.section ".text",#alloc,#execinstr
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.global $fname
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$fname:
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retl
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xor %o0,%o0,%o0 ! just signal "not implemented"
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.type $fname,#function
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.size $fname,(.-$fname)
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___
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exit;
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}
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if ($bits==64) {
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$bias=2047;
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$frame=192;
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} else {
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$bias=0;
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$frame=128; # 96 rounded up to largest known cache-line
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}
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$locals=64;
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# In order to provide for 32-/64-bit ABI duality, I keep integers wider
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# than 32 bit in %g1-%g4 and %o0-%o5. %l0-%l7 and %i0-%i5 are used
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# exclusively for pointers, indexes and other small values...
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# int bn_mul_mont(
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$rp="%i0"; # BN_ULONG *rp,
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$ap="%i1"; # const BN_ULONG *ap,
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$bp="%i2"; # const BN_ULONG *bp,
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$np="%i3"; # const BN_ULONG *np,
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$n0="%i4"; # BN_ULONG n0,
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$num="%i5"; # int num);
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$tp="%l0";
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$ap_l="%l1"; # a[num],n[num] are smashed to 32-bit words and saved
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$ap_h="%l2"; # to these four vectors as double-precision FP values.
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$np_l="%l3"; # This way a bunch of fxtods are eliminated in second
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$np_h="%l4"; # loop and L1-cache aliasing is minimized...
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$i="%l5";
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$j="%l6";
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$mask="%l7"; # 16-bit mask, 0xffff
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$n0="%g4"; # reassigned!!!
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$carry="%i4"; # reassigned!!! [only 1 bit is used]
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# FP register naming chart
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#
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# ..HILO
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# dcba
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# --------
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# LOa
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# LOb
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# LOc
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# LOd
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# HIa
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# HIb
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# HIc
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# HId
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# ..a
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# ..b
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$ba="%f0"; $bb="%f2"; $bc="%f4"; $bd="%f6";
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$na="%f8"; $nb="%f10"; $nc="%f12"; $nd="%f14";
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$alo="%f16"; $alo_="%f17"; $ahi="%f18"; $ahi_="%f19";
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$nlo="%f20"; $nlo_="%f21"; $nhi="%f22"; $nhi_="%f23";
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$dota="%f24"; $dotb="%f26";
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$aloa="%f32"; $alob="%f34"; $aloc="%f36"; $alod="%f38";
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$ahia="%f40"; $ahib="%f42"; $ahic="%f44"; $ahid="%f46";
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$nloa="%f48"; $nlob="%f50"; $nloc="%f52"; $nlod="%f54";
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$nhia="%f56"; $nhib="%f58"; $nhic="%f60"; $nhid="%f62";
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$ASI_FL16_P=0xD2; # magic ASI value to engage 16-bit FP load
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$code=<<___;
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.ident "UltraSPARC Montgomery multiply by <appro\@fy.chalmers.se>"
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.section ".text",#alloc,#execinstr
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.global $fname
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.align 32
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$fname:
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save %sp,-$frame,%sp
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sethi %hi(0xffff),$mask
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sll $num,3,$num ! num*=8
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or $mask,%lo(0xffff),$mask
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mov %i4,$n0 ! reassigned, remember?
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add %sp,$bias,%o0 ! real top of stack
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sll $num,2,%o1
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add %o1,$num,%o1 ! %o1=num*5
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sub %o0,%o1,%o0
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sub %o0,$locals,%o0
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and %o0,-2048,%o0 ! optimize TLB utilization
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sub %o0,$bias,%sp ! alloca
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rd %asi,%o7
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add %sp,$bias+$frame+$locals,$tp
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add $tp,$num,$ap_l
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add $ap_l,$num,$ap_l ! [an]p_[lh] point at the vector ends !
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add $ap_l,$num,$ap_h
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add $ap_h,$num,$np_l
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add $np_l,$num,$np_h
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wr %g0,$ASI_FL16_P,%asi ! setup %asi for 16-bit FP loads
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add $rp,$num,$rp ! readjust input pointers to point
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add $ap,$num,$ap ! at the ends too...
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add $bp,$num,$bp
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add $np,$num,$np
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stx %o7,[%sp+$bias+$frame+48]
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sub %g0,$num,$i
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sub %g0,$num,$j
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add $ap,$j,%o3
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add $bp,$i,%o4
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ldx [$bp+$i],%o0 ! bp[0]
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add $np,$j,%o5
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add %sp,$bias+$frame+0,%o7
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ldx [$ap+$j],%o1 ! ap[0]
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mulx %o1,%o0,%o0 ! ap[0]*bp[0]
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mulx $n0,%o0,%o0 ! ap[0]*bp[0]*n0
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stx %o0,[%o7]
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ld [%o3+4],$alo_ ! load a[j] as pair of 32-bit words
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fxors $alo,$alo,$alo
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ld [%o3+0],$ahi_
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fxors $ahi,$ahi,$ahi
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ld [%o5+4],$nlo_ ! load n[j] as pair of 32-bit words
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fxors $nlo,$nlo,$nlo
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ld [%o5+0],$nhi_
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fxors $nhi,$nhi,$nhi
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! transfer b[i] to FPU as 4x16-bit values
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ldda [%o4+6]%asi,$ba
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fxtod $alo,$alo
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ldda [%o4+4]%asi,$bb
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fxtod $ahi,$ahi
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ldda [%o4+2]%asi,$bc
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fxtod $nlo,$nlo
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ldda [%o4+0]%asi,$bd
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fxtod $nhi,$nhi
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! transfer ap[0]*b[0]*n0 to FPU as 4x16-bit values
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ldda [%o7+6]%asi,$na
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fxtod $ba,$ba
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ldda [%o7+4]%asi,$nb
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fxtod $bb,$bb
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ldda [%o7+2]%asi,$nc
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fxtod $bc,$bc
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ldda [%o7+0]%asi,$nd
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fxtod $bd,$bd
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std $alo,[$ap_l+$j] ! save smashed ap[j] in double format
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fxtod $na,$na
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std $ahi,[$ap_h+$j]
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fxtod $nb,$nb
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std $nlo,[$np_l+$j] ! save smashed np[j] in double format
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fxtod $nc,$nc
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std $nhi,[$np_h+$j]
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fxtod $nd,$nd
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fmuld $alo,$ba,$aloa
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fmuld $nlo,$na,$nloa
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fmuld $alo,$bb,$alob
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fmuld $nlo,$nb,$nlob
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fmuld $alo,$bc,$aloc
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fmuld $nlo,$nc,$nloc
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faddd $aloa,$nloa,$nloa
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fmuld $alo,$bd,$alod
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fmuld $nlo,$nd,$nlod
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faddd $alob,$nlob,$nlob
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fmuld $ahi,$ba,$ahia
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fmuld $nhi,$na,$nhia
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faddd $aloc,$nloc,$nloc
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fmuld $ahi,$bb,$ahib
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fmuld $nhi,$nb,$nhib
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faddd $alod,$nlod,$nlod
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fmuld $ahi,$bc,$ahic
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fmuld $nhi,$nc,$nhic
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faddd $ahia,$nhia,$nhia
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fmuld $ahi,$bd,$ahid
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fmuld $nhi,$nd,$nhid
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faddd $ahib,$nhib,$nhib
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faddd $ahic,$nhic,$dota ! $nhic
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faddd $ahid,$nhid,$dotb ! $nhid
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faddd $nloc,$nhia,$nloc
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faddd $nlod,$nhib,$nlod
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fdtox $nloa,$nloa
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fdtox $nlob,$nlob
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fdtox $nloc,$nloc
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fdtox $nlod,$nlod
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std $nloa,[%sp+$bias+$frame+0]
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std $nlob,[%sp+$bias+$frame+8]
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std $nloc,[%sp+$bias+$frame+16]
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std $nlod,[%sp+$bias+$frame+24]
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ldx [%sp+$bias+$frame+0],%o0
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ldx [%sp+$bias+$frame+8],%o1
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ldx [%sp+$bias+$frame+16],%o2
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ldx [%sp+$bias+$frame+24],%o3
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srlx %o0,16,%o7
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add %o7,%o1,%o1
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srlx %o1,16,%o7
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add %o7,%o2,%o2
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srlx %o2,16,%o7
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add %o7,%o3,%o3 ! %o3.%o2[0..15].%o1[0..15].%o0[0..15]
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!and %o0,$mask,%o0
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!and %o1,$mask,%o1
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!and %o2,$mask,%o2
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!sllx %o1,16,%o1
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!sllx %o2,32,%o2
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!sllx %o3,48,%o7
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!or %o1,%o0,%o0
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!or %o2,%o0,%o0
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!or %o7,%o0,%o0 ! 64-bit result
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srlx %o3,16,%g1 ! 34-bit carry
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ba .L1st
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add $j,8,$j
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.align 32
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.L1st:
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add $ap,$j,%o3
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add $np,$j,%o4
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ld [%o3+4],$alo_ ! load a[j] as pair of 32-bit words
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fxors $alo,$alo,$alo
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ld [%o3+0],$ahi_
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fxors $ahi,$ahi,$ahi
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ld [%o4+4],$nlo_ ! load n[j] as pair of 32-bit words
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fxors $nlo,$nlo,$nlo
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ld [%o4+0],$nhi_
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fxors $nhi,$nhi,$nhi
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fxtod $alo,$alo
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fxtod $ahi,$ahi
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fxtod $nlo,$nlo
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fxtod $nhi,$nhi
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std $alo,[$ap_l+$j] ! save smashed ap[j] in double format
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fmuld $alo,$ba,$aloa
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std $ahi,[$ap_h+$j]
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fmuld $nlo,$na,$nloa
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std $nlo,[$np_l+$j] ! save smashed np[j] in double format
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fmuld $alo,$bb,$alob
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std $nhi,[$np_h+$j]
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fmuld $nlo,$nb,$nlob
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fmuld $alo,$bc,$aloc
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fmuld $nlo,$nc,$nloc
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faddd $aloa,$nloa,$nloa
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fmuld $alo,$bd,$alod
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fmuld $nlo,$nd,$nlod
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faddd $alob,$nlob,$nlob
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fmuld $ahi,$ba,$ahia
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fmuld $nhi,$na,$nhia
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faddd $aloc,$nloc,$nloc
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fmuld $ahi,$bb,$ahib
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fmuld $nhi,$nb,$nhib
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faddd $alod,$nlod,$nlod
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fmuld $ahi,$bc,$ahic
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fmuld $nhi,$nc,$nhic
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faddd $ahia,$nhia,$nhia
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fmuld $ahi,$bd,$ahid
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fmuld $nhi,$nd,$nhid
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faddd $ahib,$nhib,$nhib
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faddd $dota,$nloa,$nloa
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faddd $dotb,$nlob,$nlob
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faddd $ahic,$nhic,$dota ! $nhic
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faddd $ahid,$nhid,$dotb ! $nhid
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faddd $nloc,$nhia,$nloc
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faddd $nlod,$nhib,$nlod
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fdtox $nloa,$nloa
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fdtox $nlob,$nlob
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fdtox $nloc,$nloc
|
|||
|
|
fdtox $nlod,$nlod
|
|||
|
|
|
|||
|
|
std $nloa,[%sp+$bias+$frame+0]
|
|||
|
|
std $nlob,[%sp+$bias+$frame+8]
|
|||
|
|
std $nloc,[%sp+$bias+$frame+16]
|
|||
|
|
std $nlod,[%sp+$bias+$frame+24]
|
|||
|
|
ldx [%sp+$bias+$frame+0],%o0
|
|||
|
|
ldx [%sp+$bias+$frame+8],%o1
|
|||
|
|
ldx [%sp+$bias+$frame+16],%o2
|
|||
|
|
ldx [%sp+$bias+$frame+24],%o3
|
|||
|
|
|
|||
|
|
srlx %o0,16,%o7
|
|||
|
|
add %o7,%o1,%o1
|
|||
|
|
srlx %o1,16,%o7
|
|||
|
|
add %o7,%o2,%o2
|
|||
|
|
srlx %o2,16,%o7
|
|||
|
|
add %o7,%o3,%o3 ! %o3.%o2[0..15].%o1[0..15].%o0[0..15]
|
|||
|
|
and %o0,$mask,%o0
|
|||
|
|
and %o1,$mask,%o1
|
|||
|
|
and %o2,$mask,%o2
|
|||
|
|
sllx %o1,16,%o1
|
|||
|
|
sllx %o2,32,%o2
|
|||
|
|
sllx %o3,48,%o7
|
|||
|
|
or %o1,%o0,%o0
|
|||
|
|
or %o2,%o0,%o0
|
|||
|
|
or %o7,%o0,%o0 ! 64-bit result
|
|||
|
|
addcc %g1,%o0,%o0
|
|||
|
|
srlx %o3,16,%g1 ! 34-bit carry
|
|||
|
|
bcs,a %xcc,.+8
|
|||
|
|
add %g1,1,%g1
|
|||
|
|
|
|||
|
|
stx %o0,[$tp] ! tp[j-1]=
|
|||
|
|
add $j,8,$j
|
|||
|
|
brnz $j,.L1st
|
|||
|
|
add $tp,8,$tp
|
|||
|
|
|
|||
|
|
fdtox $dota,$dota
|
|||
|
|
fdtox $dotb,$dotb
|
|||
|
|
std $dota,[%sp+$bias+$frame+32]
|
|||
|
|
std $dotb,[%sp+$bias+$frame+40]
|
|||
|
|
ldx [%sp+$bias+$frame+32],%o0
|
|||
|
|
ldx [%sp+$bias+$frame+40],%o1
|
|||
|
|
|
|||
|
|
srlx %o0,16,%o7
|
|||
|
|
add %o7,%o1,%o1
|
|||
|
|
and %o0,$mask,%o0
|
|||
|
|
sllx %o1,16,%o7
|
|||
|
|
or %o7,%o0,%o0
|
|||
|
|
addcc %g1,%o0,%o0
|
|||
|
|
srlx %o1,48,%g1
|
|||
|
|
bcs,a %xcc,.+8
|
|||
|
|
add %g1,1,%g1
|
|||
|
|
|
|||
|
|
mov %g1,$carry
|
|||
|
|
stx %o0,[$tp] ! tp[num-1]=
|
|||
|
|
|
|||
|
|
ba .Louter
|
|||
|
|
add $i,8,$i
|
|||
|
|
.align 32
|
|||
|
|
.Louter:
|
|||
|
|
sub %g0,$num,$j
|
|||
|
|
add %sp,$bias+$frame+$locals,$tp
|
|||
|
|
|
|||
|
|
add $bp,$i,%o4
|
|||
|
|
ldx [$bp+$i],%o0 ! bp[i]
|
|||
|
|
add %sp,$bias+$frame+0,%o7
|
|||
|
|
ldx [$ap+$j],%o1 ! ap[0]
|
|||
|
|
|
|||
|
|
ldx [$tp],%o2 ! tp[0]
|
|||
|
|
mulx %o1,%o0,%o0
|
|||
|
|
addcc %o2,%o0,%o0
|
|||
|
|
mulx $n0,%o0,%o0 ! (ap[0]*bp[i]+t[0])*n0
|
|||
|
|
stx %o0,[%o7]
|
|||
|
|
|
|||
|
|
|
|||
|
|
! transfer b[i] to FPU as 4x16-bit values
|
|||
|
|
ldda [%o4+6]%asi,$ba
|
|||
|
|
ldda [%o4+4]%asi,$bb
|
|||
|
|
ldda [%o4+2]%asi,$bc
|
|||
|
|
ldda [%o4+0]%asi,$bd
|
|||
|
|
|
|||
|
|
! transfer (ap[0]*b[i]+t[0])*n0 to FPU as 4x16-bit values
|
|||
|
|
ldda [%o7+6]%asi,$na
|
|||
|
|
fxtod $ba,$ba
|
|||
|
|
ldda [%o7+4]%asi,$nb
|
|||
|
|
fxtod $bb,$bb
|
|||
|
|
ldda [%o7+2]%asi,$nc
|
|||
|
|
fxtod $bc,$bc
|
|||
|
|
ldda [%o7+0]%asi,$nd
|
|||
|
|
fxtod $bd,$bd
|
|||
|
|
ldd [$ap_l+$j],$alo ! load a[j] in double format
|
|||
|
|
fxtod $na,$na
|
|||
|
|
ldd [$ap_h+$j],$ahi
|
|||
|
|
fxtod $nb,$nb
|
|||
|
|
ldd [$np_l+$j],$nlo ! load n[j] in double format
|
|||
|
|
fxtod $nc,$nc
|
|||
|
|
ldd [$np_h+$j],$nhi
|
|||
|
|
fxtod $nd,$nd
|
|||
|
|
|
|||
|
|
fmuld $alo,$ba,$aloa
|
|||
|
|
fmuld $nlo,$na,$nloa
|
|||
|
|
fmuld $alo,$bb,$alob
|
|||
|
|
fmuld $nlo,$nb,$nlob
|
|||
|
|
fmuld $alo,$bc,$aloc
|
|||
|
|
fmuld $nlo,$nc,$nloc
|
|||
|
|
faddd $aloa,$nloa,$nloa
|
|||
|
|
fmuld $alo,$bd,$alod
|
|||
|
|
fmuld $nlo,$nd,$nlod
|
|||
|
|
faddd $alob,$nlob,$nlob
|
|||
|
|
fmuld $ahi,$ba,$ahia
|
|||
|
|
fmuld $nhi,$na,$nhia
|
|||
|
|
faddd $aloc,$nloc,$nloc
|
|||
|
|
fmuld $ahi,$bb,$ahib
|
|||
|
|
fmuld $nhi,$nb,$nhib
|
|||
|
|
faddd $alod,$nlod,$nlod
|
|||
|
|
fmuld $ahi,$bc,$ahic
|
|||
|
|
fmuld $nhi,$nc,$nhic
|
|||
|
|
faddd $ahia,$nhia,$nhia
|
|||
|
|
fmuld $ahi,$bd,$ahid
|
|||
|
|
fmuld $nhi,$nd,$nhid
|
|||
|
|
|
|||
|
|
faddd $ahib,$nhib,$nhib
|
|||
|
|
faddd $ahic,$nhic,$dota ! $nhic
|
|||
|
|
faddd $ahid,$nhid,$dotb ! $nhid
|
|||
|
|
|
|||
|
|
faddd $nloc,$nhia,$nloc
|
|||
|
|
faddd $nlod,$nhib,$nlod
|
|||
|
|
|
|||
|
|
fdtox $nloa,$nloa
|
|||
|
|
fdtox $nlob,$nlob
|
|||
|
|
fdtox $nloc,$nloc
|
|||
|
|
fdtox $nlod,$nlod
|
|||
|
|
|
|||
|
|
std $nloa,[%sp+$bias+$frame+0]
|
|||
|
|
std $nlob,[%sp+$bias+$frame+8]
|
|||
|
|
std $nloc,[%sp+$bias+$frame+16]
|
|||
|
|
std $nlod,[%sp+$bias+$frame+24]
|
|||
|
|
ldx [%sp+$bias+$frame+0],%o0
|
|||
|
|
ldx [%sp+$bias+$frame+8],%o1
|
|||
|
|
ldx [%sp+$bias+$frame+16],%o2
|
|||
|
|
ldx [%sp+$bias+$frame+24],%o3
|
|||
|
|
|
|||
|
|
srlx %o0,16,%o7
|
|||
|
|
add %o7,%o1,%o1
|
|||
|
|
srlx %o1,16,%o7
|
|||
|
|
add %o7,%o2,%o2
|
|||
|
|
srlx %o2,16,%o7
|
|||
|
|
add %o7,%o3,%o3 ! %o3.%o2[0..15].%o1[0..15].%o0[0..15]
|
|||
|
|
! why?
|
|||
|
|
and %o0,$mask,%o0
|
|||
|
|
and %o1,$mask,%o1
|
|||
|
|
and %o2,$mask,%o2
|
|||
|
|
sllx %o1,16,%o1
|
|||
|
|
sllx %o2,32,%o2
|
|||
|
|
sllx %o3,48,%o7
|
|||
|
|
or %o1,%o0,%o0
|
|||
|
|
or %o2,%o0,%o0
|
|||
|
|
or %o7,%o0,%o0 ! 64-bit result
|
|||
|
|
ldx [$tp],%o7
|
|||
|
|
addcc %o7,%o0,%o0
|
|||
|
|
! end-of-why?
|
|||
|
|
srlx %o3,16,%g1 ! 34-bit carry
|
|||
|
|
bcs,a %xcc,.+8
|
|||
|
|
add %g1,1,%g1
|
|||
|
|
|
|||
|
|
ba .Linner
|
|||
|
|
add $j,8,$j
|
|||
|
|
.align 32
|
|||
|
|
.Linner:
|
|||
|
|
ldd [$ap_l+$j],$alo ! load a[j] in double format
|
|||
|
|
ldd [$ap_h+$j],$ahi
|
|||
|
|
ldd [$np_l+$j],$nlo ! load n[j] in double format
|
|||
|
|
ldd [$np_h+$j],$nhi
|
|||
|
|
|
|||
|
|
fmuld $alo,$ba,$aloa
|
|||
|
|
fmuld $nlo,$na,$nloa
|
|||
|
|
fmuld $alo,$bb,$alob
|
|||
|
|
fmuld $nlo,$nb,$nlob
|
|||
|
|
fmuld $alo,$bc,$aloc
|
|||
|
|
fmuld $nlo,$nc,$nloc
|
|||
|
|
faddd $aloa,$nloa,$nloa
|
|||
|
|
fmuld $alo,$bd,$alod
|
|||
|
|
fmuld $nlo,$nd,$nlod
|
|||
|
|
faddd $alob,$nlob,$nlob
|
|||
|
|
fmuld $ahi,$ba,$ahia
|
|||
|
|
fmuld $nhi,$na,$nhia
|
|||
|
|
faddd $aloc,$nloc,$nloc
|
|||
|
|
fmuld $ahi,$bb,$ahib
|
|||
|
|
fmuld $nhi,$nb,$nhib
|
|||
|
|
faddd $alod,$nlod,$nlod
|
|||
|
|
fmuld $ahi,$bc,$ahic
|
|||
|
|
fmuld $nhi,$nc,$nhic
|
|||
|
|
faddd $ahia,$nhia,$nhia
|
|||
|
|
fmuld $ahi,$bd,$ahid
|
|||
|
|
fmuld $nhi,$nd,$nhid
|
|||
|
|
|
|||
|
|
faddd $ahib,$nhib,$nhib
|
|||
|
|
faddd $dota,$nloa,$nloa
|
|||
|
|
faddd $dotb,$nlob,$nlob
|
|||
|
|
faddd $ahic,$nhic,$dota ! $nhic
|
|||
|
|
faddd $ahid,$nhid,$dotb ! $nhid
|
|||
|
|
|
|||
|
|
faddd $nloc,$nhia,$nloc
|
|||
|
|
faddd $nlod,$nhib,$nlod
|
|||
|
|
|
|||
|
|
fdtox $nloa,$nloa
|
|||
|
|
fdtox $nlob,$nlob
|
|||
|
|
fdtox $nloc,$nloc
|
|||
|
|
fdtox $nlod,$nlod
|
|||
|
|
|
|||
|
|
std $nloa,[%sp+$bias+$frame+0]
|
|||
|
|
std $nlob,[%sp+$bias+$frame+8]
|
|||
|
|
std $nloc,[%sp+$bias+$frame+16]
|
|||
|
|
std $nlod,[%sp+$bias+$frame+24]
|
|||
|
|
ldx [%sp+$bias+$frame+0],%o0
|
|||
|
|
ldx [%sp+$bias+$frame+8],%o1
|
|||
|
|
ldx [%sp+$bias+$frame+16],%o2
|
|||
|
|
ldx [%sp+$bias+$frame+24],%o3
|
|||
|
|
|
|||
|
|
srlx %o0,16,%o7
|
|||
|
|
add %o7,%o1,%o1
|
|||
|
|
srlx %o1,16,%o7
|
|||
|
|
add %o7,%o2,%o2
|
|||
|
|
srlx %o2,16,%o7
|
|||
|
|
add %o7,%o3,%o3 ! %o3.%o2[0..15].%o1[0..15].%o0[0..15]
|
|||
|
|
and %o0,$mask,%o0
|
|||
|
|
and %o1,$mask,%o1
|
|||
|
|
and %o2,$mask,%o2
|
|||
|
|
sllx %o1,16,%o1
|
|||
|
|
sllx %o2,32,%o2
|
|||
|
|
sllx %o3,48,%o7
|
|||
|
|
or %o1,%o0,%o0
|
|||
|
|
or %o2,%o0,%o0
|
|||
|
|
or %o7,%o0,%o0 ! 64-bit result
|
|||
|
|
addcc %g1,%o0,%o0
|
|||
|
|
srlx %o3,16,%g1 ! 34-bit carry
|
|||
|
|
bcs,a %xcc,.+8
|
|||
|
|
add %g1,1,%g1
|
|||
|
|
|
|||
|
|
ldx [$tp+8],%o7 ! tp[j]
|
|||
|
|
addcc %o7,%o0,%o0
|
|||
|
|
bcs,a %xcc,.+8
|
|||
|
|
add %g1,1,%g1
|
|||
|
|
|
|||
|
|
stx %o0,[$tp] ! tp[j-1]
|
|||
|
|
add $j,8,$j
|
|||
|
|
brnz $j,.Linner
|
|||
|
|
add $tp,8,$tp
|
|||
|
|
|
|||
|
|
fdtox $dota,$dota
|
|||
|
|
fdtox $dotb,$dotb
|
|||
|
|
std $dota,[%sp+$bias+$frame+32]
|
|||
|
|
std $dotb,[%sp+$bias+$frame+40]
|
|||
|
|
ldx [%sp+$bias+$frame+32],%o0
|
|||
|
|
ldx [%sp+$bias+$frame+40],%o1
|
|||
|
|
|
|||
|
|
srlx %o0,16,%o7
|
|||
|
|
add %o7,%o1,%o1
|
|||
|
|
and %o0,$mask,%o0
|
|||
|
|
sllx %o1,16,%o7
|
|||
|
|
or %o7,%o0,%o0
|
|||
|
|
addcc %g1,%o0,%o0
|
|||
|
|
srlx %o1,48,%g1
|
|||
|
|
bcs,a %xcc,.+8
|
|||
|
|
add %g1,1,%g1
|
|||
|
|
|
|||
|
|
addcc $carry,%o0,%o0
|
|||
|
|
stx %o0,[$tp] ! tp[num-1]
|
|||
|
|
mov %g1,$carry
|
|||
|
|
bcs,a %xcc,.+8
|
|||
|
|
add $carry,1,$carry
|
|||
|
|
|
|||
|
|
add $i,8,$i
|
|||
|
|
brnz $i,.Louter
|
|||
|
|
nop
|
|||
|
|
|
|||
|
|
sub %g0,$num,$j ! j=-num
|
|||
|
|
add $tp,8,$tp ! adjust tp to point at the end
|
|||
|
|
|
|||
|
|
cmp $carry,0 ! clears %icc.c
|
|||
|
|
bne,pn %icc,.Lsub
|
|||
|
|
nop
|
|||
|
|
|
|||
|
|
ld [$tp-8],%o0
|
|||
|
|
ld [$np-8],%o1
|
|||
|
|
cmp %o0,%o1
|
|||
|
|
bcs,pt %icc,.Lcopy ! %icc.c is clean if not taken
|
|||
|
|
nop
|
|||
|
|
|
|||
|
|
.align 32,0x1000000
|
|||
|
|
.Lsub:
|
|||
|
|
ldd [$tp+$j],%o0
|
|||
|
|
ldd [$np+$j],%o2
|
|||
|
|
subccc %o1,%o3,%o1
|
|||
|
|
subccc %o0,%o2,%o0
|
|||
|
|
std %o0,[$rp+$j]
|
|||
|
|
add $j,8,$j
|
|||
|
|
brnz $j,.Lsub
|
|||
|
|
nop
|
|||
|
|
subccc $carry,0,$carry
|
|||
|
|
bcc %icc,.Lzap
|
|||
|
|
sub %g0,$num,$j
|
|||
|
|
|
|||
|
|
.align 16,0x1000000
|
|||
|
|
.Lcopy:
|
|||
|
|
ldx [$tp+$j],%o0
|
|||
|
|
stx %o0,[$rp+$j]
|
|||
|
|
add $j,8,$j
|
|||
|
|
brnz $j,.Lcopy
|
|||
|
|
nop
|
|||
|
|
ba .Lzap
|
|||
|
|
sub %g0,$num,$j
|
|||
|
|
|
|||
|
|
.align 32
|
|||
|
|
.Lzap:
|
|||
|
|
stx %g0,[$tp+$j]
|
|||
|
|
stx %g0,[$ap_l+$j]
|
|||
|
|
stx %g0,[$ap_h+$j]
|
|||
|
|
stx %g0,[$np_l+$j]
|
|||
|
|
stx %g0,[$np_h+$j]
|
|||
|
|
add $j,8,$j
|
|||
|
|
brnz $j,.Lzap
|
|||
|
|
nop
|
|||
|
|
|
|||
|
|
ldx [%sp+$bias+$frame+48],%o7
|
|||
|
|
wr %g0,%o7,%asi ! restore %asi
|
|||
|
|
|
|||
|
|
mov 1,%i0
|
|||
|
|
ret
|
|||
|
|
restore
|
|||
|
|
.type $fname,#function
|
|||
|
|
.size $fname,(.-$fname)
|
|||
|
|
___
|
|||
|
|
|
|||
|
|
$code =~ s/\`([^\`]*)\`/eval($1)/gem;
|
|||
|
|
print $code;
|
|||
|
|
close STDOUT;
|