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227
crypto/rc4/asm/rc4-amd64.pl
Executable file
227
crypto/rc4/asm/rc4-amd64.pl
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#!/usr/bin/env perl
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#
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# ====================================================================
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# Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
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# project. Rights for redistribution and usage in source and binary
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# forms are granted according to the OpenSSL license.
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# ====================================================================
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#
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# 2.22x RC4 tune-up:-) It should be noted though that my hand [as in
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# "hand-coded assembler"] doesn't stand for the whole improvement
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# coefficient. It turned out that eliminating RC4_CHAR from config
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# line results in ~40% improvement (yes, even for C implementation).
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# Presumably it has everything to do with AMD cache architecture and
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# RAW or whatever penalties. Once again! The module *requires* config
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# line *without* RC4_CHAR! As for coding "secret," I bet on partial
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# register arithmetics. For example instead of 'inc %r8; and $255,%r8'
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# I simply 'inc %r8b'. Even though optimization manual discourages
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# to operate on partial registers, it turned out to be the best bet.
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# At least for AMD... How IA32E would perform remains to be seen...
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# As was shown by Marc Bevand reordering of couple of load operations
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# results in even higher performance gain of 3.3x:-) At least on
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# Opteron... For reference, 1x in this case is RC4_CHAR C-code
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# compiled with gcc 3.3.2, which performs at ~54MBps per 1GHz clock.
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# Latter means that if you want to *estimate* what to expect from
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# *your* CPU, then multiply 54 by 3.3 and clock frequency in GHz.
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# Intel P4 EM64T core was found to run the AMD64 code really slow...
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# The only way to achieve comparable performance on P4 is to keep
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# RC4_CHAR. Kind of ironic, huh? As it's apparently impossible to
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# compose blended code, which would perform even within 30% marginal
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# on either AMD and Intel platforms, I implement both cases. See
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# rc4_skey.c for further details... This applies to 0.9.8 and later.
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# In 0.9.7 context RC4_CHAR codepath is never engaged and ~70 bytes
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# of code remain redundant.
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$output=shift;
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$win64a=1 if ($output =~ /win64a.[s|asm]/);
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open STDOUT,">$output" || die "can't open $output: $!";
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if (defined($win64a)) {
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$dat="%rcx"; # arg1
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$len="%rdx"; # arg2
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$inp="%rsi"; # r8, arg3 moves here
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$out="%rdi"; # r9, arg4 moves here
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} else {
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$dat="%rdi"; # arg1
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$len="%rsi"; # arg2
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$inp="%rdx"; # arg3
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$out="%rcx"; # arg4
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}
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$XX="%r10";
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$TX="%r8";
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$YY="%r11";
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$TY="%r9";
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sub PTR() {
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my $ret=shift;
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if (defined($win64a)) {
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$ret =~ s/\[([\S]+)\+([\S]+)\]/[$2+$1]/g; # [%rN+%rM*4]->[%rM*4+%rN]
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$ret =~ s/:([^\[]+)\[([^\]]+)\]/:[$2+$1]/g; # :off[ea]->:[ea+off]
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} else {
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$ret =~ s/[\+\*]/,/g; # [%rN+%rM*4]->[%rN,%rM,4]
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$ret =~ s/\[([^\]]+)\]/($1)/g; # [%rN]->(%rN)
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}
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$ret;
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}
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$code=<<___ if (!defined($win64a));
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.text
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.globl RC4
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.type RC4,\@function
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.align 16
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RC4: or $len,$len
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jne .Lentry
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repret
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.Lentry:
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___
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$code=<<___ if (defined($win64a));
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_TEXT SEGMENT
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PUBLIC RC4
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ALIGN 16
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RC4 PROC
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or $len,$len
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jne .Lentry
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repret
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.Lentry:
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push %rdi
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push %rsi
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sub \$40,%rsp
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mov %r8,$inp
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mov %r9,$out
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___
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$code.=<<___;
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add \$8,$dat
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movl `&PTR("DWORD:-8[$dat]")`,$XX#d
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movl `&PTR("DWORD:-4[$dat]")`,$YY#d
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cmpl \$-1,`&PTR("DWORD:256[$dat]")`
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je .LRC4_CHAR
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test \$-8,$len
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jz .Lloop1
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.align 16
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.Lloop8:
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inc $XX#b
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movl `&PTR("DWORD:[$dat+$XX*4]")`,$TX#d
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add $TX#b,$YY#b
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movl `&PTR("DWORD:[$dat+$YY*4]")`,$TY#d
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movl $TX#d,`&PTR("DWORD:[$dat+$YY*4]")`
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movl $TY#d,`&PTR("DWORD:[$dat+$XX*4]")`
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add $TX#b,$TY#b
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inc $XX#b
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movl `&PTR("DWORD:[$dat+$XX*4]")`,$TX#d
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movb `&PTR("BYTE:[$dat+$TY*4]")`,%al
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___
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for ($i=1;$i<=6;$i++) {
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$code.=<<___;
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add $TX#b,$YY#b
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ror \$8,%rax
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movl `&PTR("DWORD:[$dat+$YY*4]")`,$TY#d
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movl $TX#d,`&PTR("DWORD:[$dat+$YY*4]")`
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movl $TY#d,`&PTR("DWORD:[$dat+$XX*4]")`
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add $TX#b,$TY#b
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inc $XX#b
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movl `&PTR("DWORD:[$dat+$XX*4]")`,$TX#d
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movb `&PTR("BYTE:[$dat+$TY*4]")`,%al
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___
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}
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$code.=<<___;
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add $TX#b,$YY#b
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ror \$8,%rax
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movl `&PTR("DWORD:[$dat+$YY*4]")`,$TY#d
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movl $TX#d,`&PTR("DWORD:[$dat+$YY*4]")`
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movl $TY#d,`&PTR("DWORD:[$dat+$XX*4]")`
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sub \$8,$len
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add $TY#b,$TX#b
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movb `&PTR("BYTE:[$dat+$TX*4]")`,%al
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ror \$8,%rax
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add \$8,$inp
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add \$8,$out
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xor `&PTR("QWORD:-8[$inp]")`,%rax
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mov %rax,`&PTR("QWORD:-8[$out]")`
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test \$-8,$len
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jnz .Lloop8
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cmp \$0,$len
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jne .Lloop1
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.Lexit:
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movl $XX#d,`&PTR("DWORD:-8[$dat]")`
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movl $YY#d,`&PTR("DWORD:-4[$dat]")`
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___
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$code.=<<___ if (defined($win64a));
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add \$40,%rsp
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pop %rsi
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pop %rdi
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___
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$code.=<<___;
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repret
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.align 16
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.Lloop1:
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movzb `&PTR("BYTE:[$inp]")`,%eax
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inc $XX#b
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movl `&PTR("DWORD:[$dat+$XX*4]")`,$TX#d
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add $TX#b,$YY#b
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movl `&PTR("DWORD:[$dat+$YY*4]")`,$TY#d
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movl $TX#d,`&PTR("DWORD:[$dat+$YY*4]")`
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movl $TY#d,`&PTR("DWORD:[$dat+$XX*4]")`
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add $TY#b,$TX#b
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movl `&PTR("DWORD:[$dat+$TX*4]")`,$TY#d
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xor $TY,%rax
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inc $inp
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movb %al,`&PTR("BYTE:[$out]")`
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inc $out
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dec $len
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jnz .Lloop1
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jmp .Lexit
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.align 16
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.LRC4_CHAR:
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inc $XX#b
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movzb `&PTR("BYTE:[$dat+$XX]")`,$TX#d
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add $TX#b,$YY#b
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movzb `&PTR("BYTE:[$dat+$YY]")`,$TY#d
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movb $TX#b,`&PTR("BYTE:[$dat+$YY]")`
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movb $TY#b,`&PTR("BYTE:[$dat+$XX]")`
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add $TX#b,$TY#b
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movzb `&PTR("BYTE:[$dat+$TY]")`,$TY#d
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xorb `&PTR("BYTE:[$inp]")`,$TY#b
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movb $TY#b,`&PTR("BYTE:[$out]")`
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inc $inp
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inc $out
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dec $len
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jnz .LRC4_CHAR
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jmp .Lexit
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___
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$code.=<<___ if (defined($win64a));
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RC4 ENDP
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_TEXT ENDS
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END
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___
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$code.=<<___ if (!defined($win64a));
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.size RC4,.-RC4
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___
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$code =~ s/#([bwd])/$1/gm;
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$code =~ s/\`([^\`]*)\`/eval $1/gem;
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if (defined($win64a)) {
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$code =~ s/\.align/ALIGN/gm;
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$code =~ s/[\$%]//gm;
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$code =~ s/\.L/\$L/gm;
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$code =~ s/([\w]+)([\s]+)([\S]+),([\S]+)/$1$2$4,$3/gm;
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$code =~ s/([QD]*WORD|BYTE):/$1 PTR/gm;
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$code =~ s/mov[bwlq]/mov/gm;
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$code =~ s/movzb/movzx/gm;
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$code =~ s/repret/DB\t0F3h,0C3h/gm;
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$code =~ s/cmpl/cmp/gm;
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$code =~ s/xorb/xor/gm;
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} else {
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$code =~ s/([QD]*WORD|BYTE)://gm;
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$code =~ s/repret/.byte\t0xF3,0xC3/gm;
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}
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print $code;
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148
crypto/rc4/asm/rc4-ia64.S
Normal file
148
crypto/rc4/asm/rc4-ia64.S
Normal file
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@ -0,0 +1,148 @@
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// ====================================================================
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// Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
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// project.
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//
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// Rights for redistribution and usage in source and binary forms are
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// granted according to the OpenSSL license. Warranty of any kind is
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// disclaimed.
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// ====================================================================
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.ident "rc4-ia64.S, Version 1.0"
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.ident "IA-64 ISA artwork by Andy Polyakov <appro@fy.chalmers.se>"
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// What's wrong with compiler generated code? Because of the nature of
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// C language, compiler doesn't [dare to] reorder load and stores. But
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// being memory-bound, RC4 should benefit from reorder [on in-order-
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// execution core such as IA-64]. But what can we reorder? At the very
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// least we can safely reorder references to key schedule in respect
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// to input and output streams. Secondly, less obvious, it's possible
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// to pull up some references to elements of the key schedule itself.
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// Fact is that such prior loads are not safe only for "degenerated"
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// key schedule, when some elements equal to the same value, which is
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// never the case [key schedule setup routine makes sure it's not].
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// Furthermore. In order to compress loop body to the minimum, I chose
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// to deploy deposit instruction, which substitutes for the whole
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// key->data+((x&255)<<log2(sizeof(key->data[0]))). This unfortunately
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// requires key->data to be aligned at sizeof(key->data) boundary.
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// This is why you'll find "RC4_INT pad[512-256-2];" addenum to RC4_KEY
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// and "d=(RC4_INT *)(((size_t)(d+255))&~(sizeof(key->data)-1));" in
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// rc4_skey.c [and rc4_enc.c, where it's retained for debugging
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// purposes]. Throughput is ~210MBps on 900MHz CPU, which is is >3x
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// faster than gcc generated code and +30% - if compared to HP-UX C.
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// Unrolling loop below should give >30% on top of that...
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.text
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.explicit
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#if defined(_HPUX_SOURCE) && !defined(_LP64)
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# define ADDP addp4
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#else
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# define ADDP add
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#endif
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#define SZ 4 // this is set to sizeof(RC4_INT)
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// SZ==4 seems to be optimal. At least SZ==8 is not any faster, not for
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// assembler implementation, while SZ==1 code is ~30% slower.
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#if SZ==1 // RC4_INT is unsigned char
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# define LDKEY ld1
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# define STKEY st1
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# define OFF 0
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#elif SZ==4 // RC4_INT is unsigned int
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# define LDKEY ld4
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# define STKEY st4
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# define OFF 2
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#elif SZ==8 // RC4_INT is unsigned long
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# define LDKEY ld8
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# define STKEY st8
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# define OFF 3
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#endif
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out=r8; // [expanded] output pointer
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inp=r9; // [expanded] output pointer
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prsave=r10;
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key=r28; // [expanded] pointer to RC4_KEY
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ksch=r29; // (key->data+255)[&~(sizeof(key->data)-1)]
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xx=r30;
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yy=r31;
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// void RC4(RC4_KEY *key,size_t len,const void *inp,void *out);
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.global RC4#
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.proc RC4#
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.align 32
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.skip 16
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RC4:
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.prologue
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.fframe 0
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.save ar.pfs,r2
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.save ar.lc,r3
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.save pr,prsave
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{ .mii; alloc r2=ar.pfs,4,12,0,16
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mov prsave=pr
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ADDP key=0,in0 };;
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{ .mib; cmp.eq p6,p0=0,in1 // len==0?
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mov r3=ar.lc
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(p6) br.ret.spnt.many b0 };; // emergency exit
|
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.body
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.rotr dat[4],key_x[4],tx[2],rnd[2],key_y[2],ty[1];
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{ .mib; LDKEY xx=[key],SZ // load key->x
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add in1=-1,in1 // adjust len for loop counter
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nop.b 0 }
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{ .mib; ADDP inp=0,in2
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ADDP out=0,in3
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brp.loop.imp .Ltop,.Lexit-16 };;
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{ .mmi; LDKEY yy=[key] // load key->y
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add ksch=(255+1)*SZ,key // as ksch will be used with
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// deposit instruction only,
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// I don't have to &~255...
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mov ar.lc=in1 }
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{ .mmi; nop.m 0
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add xx=1,xx
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mov pr.rot=1<<16 };;
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{ .mii; nop.m 0
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dep key_x[1]=xx,ksch,OFF,8
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mov ar.ec=3 };; // note that epilogue counter
|
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// is off by 1. I compensate
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// for this at exit...
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.Ltop:
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// The loop is scheduled for 3*(n+2) spin-rate on Itanium 2, which
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// theoretically gives asymptotic performance of clock frequency
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// divided by 3 bytes per seconds, or 500MBps on 1.5GHz CPU. Measured
|
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// performance however is distinctly lower than 1/4:-( The culplrit
|
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// seems to be *(out++)=dat, which inadvertently splits the bundle,
|
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// even though there is M-unit available... Unrolling is due...
|
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// Unrolled loop should collect output with variable shift instruction
|
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// in order to avoid starvation for integer shifter... Only output
|
||||
// pointer has to be aligned... It should be possible to get pretty
|
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// close to theoretical peak...
|
||||
{ .mmi; (p16) LDKEY tx[0]=[key_x[1]] // tx=key[xx]
|
||||
(p17) LDKEY ty[0]=[key_y[1]] // ty=key[yy]
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(p18) dep rnd[1]=rnd[1],ksch,OFF,8} // &key[(tx+ty)&255]
|
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{ .mmi; (p19) st1 [out]=dat[3],1 // *(out++)=dat
|
||||
(p16) add xx=1,xx // x++
|
||||
(p0) nop.i 0 };;
|
||||
{ .mmi; (p18) LDKEY rnd[1]=[rnd[1]] // rnd=key[(tx+ty)&255]
|
||||
(p16) ld1 dat[0]=[inp],1 // dat=*(inp++)
|
||||
(p16) dep key_x[0]=xx,ksch,OFF,8 } // &key[xx&255]
|
||||
{ .mmi; (p0) nop.m 0
|
||||
(p16) add yy=yy,tx[0] // y+=tx
|
||||
(p0) nop.i 0 };;
|
||||
{ .mmi; (p17) STKEY [key_y[1]]=tx[1] // key[yy]=tx
|
||||
(p17) STKEY [key_x[2]]=ty[0] // key[xx]=ty
|
||||
(p16) dep key_y[0]=yy,ksch,OFF,8 } // &key[yy&255]
|
||||
{ .mmb; (p17) add rnd[0]=tx[1],ty[0] // tx+=ty
|
||||
(p18) xor dat[2]=dat[2],rnd[1] // dat^=rnd
|
||||
br.ctop.sptk .Ltop };;
|
||||
.Lexit:
|
||||
{ .mib; STKEY [key]=yy,-SZ // save key->y
|
||||
mov pr=prsave,0x1ffff
|
||||
nop.b 0 }
|
||||
{ .mib; st1 [out]=dat[3],1 // compensate for truncated
|
||||
// epilogue counter
|
||||
add xx=-1,xx
|
||||
nop.b 0 };;
|
||||
{ .mib; STKEY [key]=xx // save key->x
|
||||
mov ar.lc=r3
|
||||
br.ret.sptk.many b0 };;
|
||||
.endp RC4#
|
||||
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