sparcv9cap.c: disengange Solaris-specific CPU detection routine in favour
of unified procedure relying on SIGILL [from HEAD]. PR: 2321
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2 changed files with 83 additions and 33 deletions
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@ -232,13 +232,23 @@ _sparcv9_rdtick:
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.type _sparcv9_rdtick,#function
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.size _sparcv9_rdtick,.-_sparcv9_rdtick
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.global _sparcv9_vis1_probe
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.align 8
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_sparcv9_vis1_probe:
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.word 0x81b00d80 !fxor %f0,%f0,%f0
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add %sp,BIAS+2,%o1
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retl
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.word 0xc19a5a40 !ldda [%o1]ASI_FP16_P,%f0
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.type _sparcv9_vis1_probe,#function
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.size _sparcv9_vis1_probe,.-_sparcv9_vis1_probe
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! Probe and instrument VIS1 instruction. Output is number of cycles it
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! takes to execute rdtick and pair of VIS1 instructions. US-Tx VIS unit
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! is slow (documented to be 6 cycles on T2) and the core is in-order
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! single-issue, it should be possible to distinguish Tx reliably...
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! Observed return values are:
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!
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! UltraSPARC IIi 7
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! UltraSPARC IIe 7
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! UltraSPARC III 7
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! UltraSPARC T1 24
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!
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@ -247,9 +257,9 @@ _sparcv9_rdtick:
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! It would be possible to detect specifically US-T1 by instrumenting
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! fmul8ulx16, which is emulated on T1 and as such accounts for quite
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! a lot of %tick-s, couple of thousand on Linux...
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.global _sparcv9_vis1_probe
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.global _sparcv9_vis1_instrument
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.align 8
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_sparcv9_vis1_probe:
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_sparcv9_vis1_instrument:
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.word 0x91410000 !rd %tick,%o0
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.word 0x81b00d80 !fxor %f0,%f0,%f0
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.word 0x85b08d82 !fxor %f2,%f2,%f2
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@ -281,12 +291,28 @@ _sparcv9_vis1_probe:
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.word 0x38680002 !bgu,a %xcc,.+8
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mov %o3,%o0
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! check for ASI_FP16_P is redundant...
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add %sp,BIAS+2,%o1
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retl
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.word 0xc19a5a40 !ldda [%o1]ASI_FP16_P,%f0
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.type _sparcv9_vis1_probe,#function
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.size _sparcv9_vis1_probe,.-_sparcv9_vis1_probe
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nop
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.type _sparcv9_vis1_instrument,#function
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.size _sparcv9_vis1_instrument,.-_sparcv9_vis1_instrument
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.global _sparcv9_vis2_probe
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.align 8
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_sparcv9_vis2_probe:
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retl
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.word 0x81b00980 !bshuffle %f0,%f0,%f0
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.type _sparcv9_vis2_probe,#function
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.size _sparcv9_vis2_probe,.-_sparcv9_vis2_probe
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.global _sparcv9_fmadd_probe
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.align 8
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_sparcv9_fmadd_probe:
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.word 0x81b00d80 !fxor %f0,%f0,%f0
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.word 0x85b08d82 !fxor %f2,%f2,%f2
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retl
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.word 0x81b80440 !fmaddd %f0,%f0,%f2,%f0
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.type _sparcv9_fmadd_probe,#function
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.size _sparcv9_fmadd_probe,.-_sparcv9_fmadd_probe
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.global OPENSSL_cleanse
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.align 32
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@ -27,7 +27,10 @@ int bn_mul_mont(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp, const BN_U
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}
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unsigned long _sparcv9_rdtick(void);
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unsigned long _sparcv9_vis1_probe(void);
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void _sparcv9_vis1_probe(void);
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unsigned long _sparcv9_vis1_instrument(void);
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void _sparcv9_vis2_probe(void);
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void _sparcv9_fmadd_probe(void);
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unsigned long OPENSSL_rdtsc(void)
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{
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@ -41,8 +44,11 @@ unsigned long OPENSSL_rdtsc(void)
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return _sparcv9_rdtick();
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}
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#if defined(__sun) && defined(__SVR4)
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#if 0 && defined(__sun) && defined(__SVR4)
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/* This code path is disabled, because of incompatibility of
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* libdevinfo.so.1 and libmalloc.so.1 (see below for details)
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*/
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#include <malloc.h>
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#include <dlfcn.h>
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#include <libdevinfo.h>
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#include <sys/systeminfo.h>
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@ -114,7 +120,21 @@ void OPENSSL_cpuid_setup(void)
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return;
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}
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}
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#ifdef M_KEEP
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/*
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* Solaris libdevinfo.so.1 is effectively incomatible with
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* libmalloc.so.1. Specifically, if application is linked with
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* -lmalloc, it crashes upon startup with SIGSEGV in
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* free(3LIBMALLOC) called by di_fini. Prior call to
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* mallopt(M_KEEP,0) somehow helps... But not always...
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*/
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if ((h = dlopen(NULL,RTLD_LAZY)))
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{
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union { void *p; int (*f)(int,int); } sym;
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if ((sym.p = dlsym(h,"mallopt"))) (*sym.f)(M_KEEP,0);
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dlclose(h);
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}
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#endif
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if ((h = dlopen("libdevinfo.so.1",RTLD_LAZY))) do
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{
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di_init_t di_init;
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@ -150,6 +170,10 @@ void OPENSSL_cpuid_setup(void)
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struct sigaction common_act,ill_oact,bus_oact;
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sigset_t all_masked,oset;
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int sig;
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static int trigger=0;
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if (trigger) return;
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trigger=1;
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if ((e=getenv("OPENSSL_sparcv9cap")))
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{
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@ -157,8 +181,8 @@ void OPENSSL_cpuid_setup(void)
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return;
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}
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/* For now we assume that the rest supports UltraSPARC-I* only */
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OPENSSL_sparcv9cap_P |= SPARCV9_PREFER_FPU|SPARCV9_VIS1;
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/* Initial value, fits UltraSPARC-I&II... */
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OPENSSL_sparcv9cap_P = SPARCV9_PREFER_FPU|SPARCV9_TICK_PRIVILEGED;
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sigfillset(&all_masked);
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sigdelset(&all_masked,SIGILL);
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@ -176,34 +200,34 @@ void OPENSSL_cpuid_setup(void)
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common_act.sa_mask = all_masked;
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sigaction(SIGILL,&common_act,&ill_oact);
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if (sigsetjmp(common_jmp,0) == 0)
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sigaction(SIGBUS,&common_act,&bus_oact);/* T1 fails 16-bit ldda [on Linux] */
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if (sigsetjmp(common_jmp,1) == 0)
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{
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_sparcv9_rdtick();
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OPENSSL_sparcv9cap_P &= ~SPARCV9_TICK_PRIVILEGED;
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}
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else
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{
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/* This happens on US-I&II, which have working VIS1
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* and fast FPU... In other words we are done... */
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OPENSSL_sparcv9cap_P |= SPARCV9_TICK_PRIVILEGED;
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sigaction(SIGILL,&ill_oact,NULL);
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sigprocmask(SIG_SETMASK,&oset,NULL);
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return;
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}
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sigaction(SIGILL,&ill_oact,NULL);
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sigaction(SIGILL,&common_act,&ill_oact);
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sigaction(SIGBUS,&common_act,&bus_oact);/* T1 fails 16-bit ldda */
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if ((sig=sigsetjmp(common_jmp,0)) == 0)
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if (sigsetjmp(common_jmp,1) == 0)
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{
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/* see sparccpud.S for details... */
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if (_sparcv9_vis1_probe() >= 12)
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OPENSSL_sparcv9cap_P &= ~SPARCV9_VIS1;
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_sparcv9_vis1_probe();
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OPENSSL_sparcv9cap_P |= SPARCV9_VIS1;
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/* detect UltraSPARC-Tx, see sparccpud.S for details... */
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if (_sparcv9_vis1_instrument() >= 12)
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OPENSSL_sparcv9cap_P &= ~(SPARCV9_VIS1|SPARCV9_PREFER_FPU);
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else
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{
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_sparcv9_vis2_probe();
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OPENSSL_sparcv9cap_P |= SPARCV9_VIS2;
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}
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}
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else
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if (sigsetjmp(common_jmp,1) == 0)
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{
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OPENSSL_sparcv9cap_P &= ~SPARCV9_VIS1;
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_sparcv9_fmadd_probe();
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OPENSSL_sparcv9cap_P |= SPARCV9_FMADD;
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}
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sigaction(SIGBUS,&bus_oact,NULL);
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sigaction(SIGILL,&ill_oact,NULL);
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