openbsd-x86 macros

Submitted by: Toomas Kiisk <vix@cyber.ee>
This commit is contained in:
Ulf Möller 2001-10-14 00:57:30 +00:00
parent 56fa8e69cf
commit 5dd955dcd2
7 changed files with 10 additions and 10 deletions

View file

@ -130,7 +130,7 @@ int BN_div(BIGNUM *dv, BIGNUM *rem, const BIGNUM *m, const BIGNUM *d,
#if !defined(OPENSSL_NO_ASM) && !defined(OPENSSL_NO_INLINE_ASM) \
&& !defined(PEDANTIC) && !defined(BN_DIV3W)
# if defined(__GNUC__) && __GNUC__>=2
# if defined(__i386)
# if defined(__i386) || defined (__i386__)
/*
* There were two reasons for implementing this template:
* - GNU C generates a call to a function (__udivdi3 to be exact)

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@ -66,7 +66,7 @@
#include "cryptlib.h"
#include "bn_lcl.h"
#if defined(OPENSSL_NO_ASM) || !defined(__i386) /* Assembler implementation exists only for x86 */
#if defined(OPENSSL_NO_ASM) || !(defined(__i386) || defined(__i386__))/* Assembler implementation exists only for x86 */
/* Here follows specialised variants of bn_add_words() and
bn_sub_words(). They have the property performing operations on
arrays of different sizes. The sizes of those arrays is expressed through

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@ -198,7 +198,7 @@
*
* <appro@fy.chalmers.se>
*/
# if defined(__i386)
# if defined(__i386) || defined(__i386__)
# define ROTATE(a,n) ({ register unsigned int ret; \
asm ( \
"roll %1,%0" \
@ -224,7 +224,7 @@
*/
# if defined(__GNUC__) && __GNUC__>=2 && !defined(OPENSSL_NO_ASM) && !defined(OPENSSL_NO_INLINE_ASM)
/* some GNU C inline assembler templates by <appro@fy.chalmers.se> */
# if defined(__i386) && !defined(I386_ONLY)
# if (defined(__i386) || defined(__i386__)) && !defined(I386_ONLY)
# define BE_FETCH32(a) ({ register unsigned int l=(a);\
asm ( \
"bswapl %0" \

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@ -68,7 +68,7 @@
void md4_block_host_order (MD4_CTX *c, const void *p,int num);
void md4_block_data_order (MD4_CTX *c, const void *p,int num);
#if defined(__i386) || defined(_M_IX86) || defined(__INTEL__)
#if defined(__i386) || defined(__i386__) || defined(_M_IX86) || defined(__INTEL__)
/*
* *_block_host_order is expected to handle aligned data while
* *_block_data_order - unaligned. As algorithm and host (x86)

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@ -66,7 +66,7 @@
#endif
#ifdef MD5_ASM
# if defined(__i386) || defined(_M_IX86) || defined(__INTEL__)
# if defined(__i386) || defined(__i386__) || defined(_M_IX86) || defined(__INTEL__)
# define md5_block_host_order md5_block_asm_host_order
# elif defined(__sparc) && defined(OPENSSL_SYS_ULTRASPARC)
void md5_block_asm_data_order_aligned (MD5_CTX *c, const MD5_LONG *p,int num);
@ -77,7 +77,7 @@
void md5_block_host_order (MD5_CTX *c, const void *p,int num);
void md5_block_data_order (MD5_CTX *c, const void *p,int num);
#if defined(__i386) || defined(_M_IX86) || defined(__INTEL__)
#if defined(__i386) || defined(__i386__) || defined(_M_IX86) || defined(__INTEL__)
/*
* *_block_host_order is expected to handle aligned data while
* *_block_data_order - unaligned. As algorithm and host (x86)

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@ -71,7 +71,7 @@
* <appro@fy.chalmers.se>
*/
#ifdef RMD160_ASM
# if defined(__i386) || defined(_M_IX86) || defined(__INTEL__)
# if defined(__i386) || defined(__i386__) || defined(_M_IX86) || defined(__INTEL__)
# define ripemd160_block_host_order ripemd160_block_asm_host_order
# endif
#endif
@ -79,7 +79,7 @@
void ripemd160_block_host_order (RIPEMD160_CTX *c, const void *p,int num);
void ripemd160_block_data_order (RIPEMD160_CTX *c, const void *p,int num);
#if defined(__i386) || defined(_M_IX86) || defined(__INTEL__)
#if defined(__i386) || defined(__i386__) || defined(_M_IX86) || defined(__INTEL__)
#define ripemd160_block_data_order ripemd160_block_host_order
#endif

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@ -115,7 +115,7 @@
# endif
# ifdef SHA1_ASM
# if defined(__i386) || defined(_M_IX86) || defined(__INTEL__)
# if defined(__i386) || defined(__i386__) || defined(_M_IX86) || defined(__INTEL__)
# define sha1_block_host_order sha1_block_asm_host_order
# define DONT_IMPLEMENT_BLOCK_HOST_ORDER
# define sha1_block_data_order sha1_block_asm_data_order