aesv8-armx.pl update:
- fix 32-bit build (submitted by Ard Biesheuvel); - fix performance issue in CTR;
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1 changed files with 24 additions and 17 deletions
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@ -18,9 +18,9 @@
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#
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# Performance in cycles per byte processed with 128-bit key:
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#
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# CBC enc CBC dec
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# Apple A7 2.39 1.20
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# Cortex-A5x n/a n/a
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# CBC enc CBC dec CTR
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# Apple A7 2.39 1.20 1.20
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# Cortex-A5x n/a n/a n/a
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$flavour = shift;
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open STDOUT,">".shift;
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@ -733,12 +733,11 @@ $code.=<<___;
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subs $len,$len,#2
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aesmc $tmp0,$tmp0
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aesmc $tmp1,$tmp1
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vld1.32 {q8},[$key_],#16 // re-pre-load rndkey[0]
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vld1.32 {q8-q9},[$key_],#32 // re-pre-load rndkey[0-1]
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aese $tmp0,q13
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aese $tmp1,q13
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aesmc $tmp0,$tmp0
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aesmc $tmp1,$tmp1
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vld1.32 {q9},[$key_],#16 // re-pre-load rndkey[1]
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aese $tmp0,q14
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aese $tmp1,q14
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vmov.32 ${dat0}[3], $tctr
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@ -878,14 +877,14 @@ if ($flavour =~ /64/) { ######## 64-bit code
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"aesd" => 0x4e285800, "aese" => 0x4e284800,
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"aesimc"=> 0x4e287800, "aesmc" => 0x4e286800 );
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sub unaes {
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local *unaes = sub {
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my ($mnemonic,$arg)=@_;
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$arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)/o &&
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sprintf ".long\t0x%08x\t//%s %s",
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sprintf ".inst\t0x%08x\t//%s %s",
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$opcode{$mnemonic}|$1|($2<<5),
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$mnemonic,$arg;
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}
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};
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foreach(split("\n",$code)) {
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s/\`([^\`]*)\`/eval($1)/geo;
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@ -917,35 +916,42 @@ if ($flavour =~ /64/) { ######## 64-bit code
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"aesd" => 0xf3b00340, "aese" => 0xf3b00300,
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"aesimc"=> 0xf3b003c0, "aesmc" => 0xf3b00380 );
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sub unaes {
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local *unaes = sub {
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my ($mnemonic,$arg)=@_;
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$arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)/o &&
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sprintf ".long\t0x%08x\t@ %s %s",
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$opcode{$mnemonic}|(($1&7)<<13)|(($1&8)<<19)
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|(($2&7)<<1) |(($2&8)<<2),
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if ($arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)/o) {
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my $word = $opcode{$mnemonic}|(($1&7)<<13)|(($1&8)<<19)
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|(($2&7)<<1) |(($2&8)<<2);
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# since ARMv7 instructions are always encoded little-endian.
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# correct solution is to use .inst directive, but older
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# assemblers don't implement it:-(
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sprintf ".byte\t0x%02x,0x%02x,0x%02x,0x%02x\t@ %s %s",
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$word&0xff,($word>>8)&0xff,
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($word>>16)&0xff,($word>>24)&0xff,
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$mnemonic,$arg;
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}
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}
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};
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sub unvtbl {
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my $arg=shift;
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$arg =~ m/q([0-9]+),\s*\{q([0-9]+)\},\s*q([0-9]+)/o &&
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sprintf "vtbl.8 d%d,{q%d},d%d\n\tvtbl.8 d%d,{q%d},d%d",2*$1,$2,2*$3,2*$1+1,$2,2*$3+1;
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sprintf "vtbl.8 d%d,{q%d},d%d\n\t".
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"vtbl.8 d%d,{q%d},d%d", 2*$1,$2,2*$3, 2*$1+1,$2,2*$3+1;
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}
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sub unvdup32 {
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my $arg=shift;
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$arg =~ m/q([0-9]+),\s*q([0-9]+)\[([0-3])\]/o &&
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sprintf "vdup.32 q%d,d%d[%d]",$1,2*$2+$3>>1,$3&1;
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sprintf "vdup.32 q%d,d%d[%d]",$1,2*$2+($3>>1),$3&1;
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}
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sub unvmov32 {
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my $arg=shift;
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$arg =~ m/q([0-9]+)\[([0-3])\],(.*)/o &&
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sprintf "vmov.32 d%d[%d],%s",2*$1+$2>>1,$2&1,$3;
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sprintf "vmov.32 d%d[%d],%s",2*$1+($2>>1),$2&1,$3;
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}
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foreach(split("\n",$code)) {
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@ -956,6 +962,7 @@ if ($flavour =~ /64/) { ######## 64-bit code
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s/\/\/\s?/@ /o; # new->old style commentary
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# fix up remainig new-style suffixes
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s/\{q([0-9]+)\},\s*\[(.+)\],#8/sprintf "{d%d},[$2]!",2*$1/eo or
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s/\],#[0-9]+/]!/o;
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s/[v]?(aes\w+)\s+([qv].*)/unaes($1,$2)/geo or
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