Eliminate false preprocessor dependencies introduced with VOS support.
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aa8b03b415
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5 changed files with 17 additions and 17 deletions
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@ -288,6 +288,7 @@
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# if defined(__GNUC__) && __GNUC__>=2 && !defined(OPENSSL_NO_ASM) && !defined(OPENSSL_NO_INLINE_ASM)
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# if ((defined(__i386) || defined(__i386__)) && !defined(I386_ONLY)) || \
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(defined(__x86_64) || defined(__x86_64__))
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# if !defined(B_ENDIAN)
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/*
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* This gives ~30-40% performance improvement in SHA-256 compiled
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* with gcc [on P4]. Well, first macro to be frank. We can pull
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@ -300,6 +301,7 @@
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# define HOST_l2c(l,c) ({ unsigned int r=(l); \
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asm ("bswapl %0":"=r"(r):"0"(r)); \
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*((unsigned int *)(c))=r; (c)+=4; r; })
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# endif
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# endif
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# endif
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#endif
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@ -68,7 +68,8 @@
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void md4_block_host_order (MD4_CTX *c, const void *p,size_t num);
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void md4_block_data_order (MD4_CTX *c, const void *p,size_t num);
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#if defined(__i386) || defined(__i386__) || defined(_M_IX86) || defined(__INTEL__)
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#if defined(__i386) || defined(__i386__) || defined(_M_IX86) || defined(__INTEL__) || \
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defined(__x86_64) || defined(__x86_64__) || defined(_M_AMD64) || defined(_M_X64)
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# if !defined(B_ENDIAN)
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/*
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* *_block_host_order is expected to handle aligned data while
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@ -66,10 +66,9 @@
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#endif
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#ifdef MD5_ASM
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# if defined(__i386) || defined(__i386__) || defined(_M_IX86) || defined(__INTEL__) || defined(__x86_64) || defined(__x86_64__)
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# if !defined(B_ENDIAN)
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# define md5_block_host_order md5_block_asm_host_order
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# endif
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# if defined(__i386) || defined(__i386__) || defined(_M_IX86) || defined(__INTEL__) || \
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defined(__x86_64) || defined(__x86_64__) || defined(_M_AMD64) || defined(_M_X64)
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# define md5_block_host_order md5_block_asm_host_order
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# elif defined(__sparc) && defined(OPENSSL_SYS_ULTRASPARC)
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void md5_block_asm_data_order_aligned (MD5_CTX *c, const MD5_LONG *p,size_t num);
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# define HASH_BLOCK_DATA_ORDER_ALIGNED md5_block_asm_data_order_aligned
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@ -82,7 +81,8 @@
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void md5_block_host_order (MD5_CTX *c, const void *p,size_t num);
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void md5_block_data_order (MD5_CTX *c, const void *p,size_t num);
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#if defined(__i386) || defined(__i386__) || defined(_M_IX86) || defined(__INTEL__) || defined(__x86_64) || defined(__x86_64__)
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#if defined(__i386) || defined(__i386__) || defined(_M_IX86) || defined(__INTEL__) || \
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defined(__x86_64) || defined(__x86_64__) || defined(_M_AMD64) || defined(_M_X64)
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# if !defined(B_ENDIAN)
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/*
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* *_block_host_order is expected to handle aligned data while
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@ -72,16 +72,15 @@
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*/
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#ifdef RMD160_ASM
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# if defined(__i386) || defined(__i386__) || defined(_M_IX86) || defined(__INTEL__)
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# if !defined(B_ENDIAN)
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# define ripemd160_block_host_order ripemd160_block_asm_host_order
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# endif
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# define ripemd160_block_host_order ripemd160_block_asm_host_order
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# endif
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#endif
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void ripemd160_block_host_order (RIPEMD160_CTX *c, const void *p,size_t num);
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void ripemd160_block_data_order (RIPEMD160_CTX *c, const void *p,size_t num);
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#if defined(__i386) || defined(__i386__) || defined(_M_IX86) || defined(__INTEL__)
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#if defined(__i386) || defined(__i386__) || defined(_M_IX86) || defined(__INTEL__) || \
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defined(__x86_64) || defined(__x86_64__) || defined(_M_AMD64) || defined(_M_X64)
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# if !defined(B_ENDIAN)
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# define ripemd160_block_data_order ripemd160_block_host_order
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# endif
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@ -116,13 +116,11 @@
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# ifdef SHA1_ASM
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# if defined(__i386) || defined(__i386__) || defined(_M_IX86) || defined(__INTEL__)
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# if !defined(B_ENDIAN)
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# define sha1_block_host_order sha1_block_asm_host_order
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# define DONT_IMPLEMENT_BLOCK_HOST_ORDER
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# define sha1_block_data_order sha1_block_asm_data_order
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# define DONT_IMPLEMENT_BLOCK_DATA_ORDER
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# define HASH_BLOCK_DATA_ORDER_ALIGNED sha1_block_asm_data_order
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# endif
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# define sha1_block_host_order sha1_block_asm_host_order
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# define DONT_IMPLEMENT_BLOCK_HOST_ORDER
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# define sha1_block_data_order sha1_block_asm_data_order
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# define DONT_IMPLEMENT_BLOCK_DATA_ORDER
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# define HASH_BLOCK_DATA_ORDER_ALIGNED sha1_block_asm_data_order
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# elif defined(__ia64) || defined(__ia64__) || defined(_M_IA64)
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# define sha1_block_host_order sha1_block_asm_host_order
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# define DONT_IMPLEMENT_BLOCK_HOST_ORDER
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