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Move cpuid_asm_src file information to build.info files

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Also took away the internal 'debug-linux-ia32-aes' config target, as
it's broken (refers to files that no longer exist).

Reviewed-by: Matt Caswell <matt@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/9166)
This commit is contained in:
Richard Levitte 2019-06-16 19:35:08 +02:00
parent d9dfeb940c
commit 6e1ba47219
6 changed files with 39 additions and 52 deletions
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12
Configurations/00-base-templates.conf
View file

@ -14,7 +14,6 @@ my %targets=(
thread_scheme => "(unknown)", # Assume we don't know
thread_defines => [],
cpuid_asm_src => "mem_clr.c",
ec_asm_src => "",
des_asm_src => "des_enc.c fcrypt_b.c",
aes_asm_src => "aes_core.c aes_cbc.c",
@ -167,7 +166,6 @@ my %targets=(
x86_asm => {
template => 1,
cpuid_asm_src => "x86cpuid.s",
ec_asm_src => "ecp_nistz256.c ecp_nistz256-x86.s",
des_asm_src => "des-586.s crypt586.s",
aes_asm_src => "aes-586.s vpaes-x86.s aesni-x86.s",
@ -191,7 +189,6 @@ my %targets=(
},
x86_64_asm => {
template => 1,
cpuid_asm_src => "x86_64cpuid.s",
ec_asm_src => "ecp_nistz256.c ecp_nistz256-x86_64.s x25519-x86_64.s",
aes_asm_src => "aes-x86_64.s vpaes-x86_64.s bsaes-x86_64.s aesni-x86_64.s aesni-sha1-x86_64.s aesni-sha256-x86_64.s aesni-mb-x86_64.s",
md5_asm_src => "md5-x86_64.s",
@ -207,7 +204,6 @@ my %targets=(
},
ia64_asm => {
template => 1,
cpuid_asm_src => "ia64cpuid.s",
aes_asm_src => "aes_core.c aes_cbc.c aes-ia64.s",
sha1_asm_src => "sha1-ia64.s sha256-ia64.s sha512-ia64.s",
modes_asm_src => "ghash-ia64.s",
@ -216,7 +212,6 @@ my %targets=(
},
sparcv9_asm => {
template => 1,
cpuid_asm_src => "sparcv9cap.c sparccpuid.S",
ec_asm_src => "ecp_nistz256.c ecp_nistz256-sparcv9.S",
des_asm_src => "des_enc-sparc.S fcrypt_b.c dest4-sparcv9.S",
aes_asm_src => "aes_core.c aes_cbc.c aes-sparcv9.S aest4-sparcv9.S aesfx-sparcv9.S",
@ -228,12 +223,10 @@ my %targets=(
},
sparcv8_asm => {
template => 1,
cpuid_asm_src => "",
des_asm_src => "des_enc-sparc.S fcrypt_b.c",
},
alpha_asm => {
template => 1,
cpuid_asm_src => "alphacpuid.s",
sha1_asm_src => "sha1-alpha.S",
modes_asm_src => "ghash-alpha.S",
},
@ -250,7 +243,6 @@ my %targets=(
},
s390x_asm => {
template => 1,
cpuid_asm_src => "s390xcap.c s390xcpuid.S",
aes_asm_src => "aes-s390x.S aes-ctr.fake aes-xts.fake",
sha1_asm_src => "sha1-s390x.S sha256-s390x.S sha512-s390x.S",
rc4_asm_src => "rc4-s390x.s",
@ -261,7 +253,6 @@ my %targets=(
},
armv4_asm => {
template => 1,
cpuid_asm_src => "armcap.c armv4cpuid.S",
ec_asm_src => "ecp_nistz256.c ecp_nistz256-armv4.S",
aes_asm_src => "aes_cbc.c aes-armv4.S bsaes-armv7.S aesv8-armx.S",
sha1_asm_src => "sha1-armv4-large.S sha256-armv4.S sha512-armv4.S",
@ -272,7 +263,6 @@ my %targets=(
},
aarch64_asm => {
template => 1,
cpuid_asm_src => "armcap.c arm64cpuid.S",
ec_asm_src => "ecp_nistz256.c ecp_nistz256-armv8.S",
aes_asm_src => "aes_core.c aes_cbc.c aesv8-armx.S vpaes-armv8.S",
sha1_asm_src => "sha1-armv8.S sha256-armv8.S sha512-armv8.S",
@ -283,7 +273,6 @@ my %targets=(
},
parisc11_asm => {
template => 1,
cpuid_asm_src => "pariscid.s",
aes_asm_src => "aes_core.c aes_cbc.c aes-parisc.s",
sha1_asm_src => "sha1-parisc.s sha256-parisc.s sha512-parisc.s",
rc4_asm_src => "rc4-parisc.s",
@ -295,7 +284,6 @@ my %targets=(
},
ppc32_asm => {
template => 1,
cpuid_asm_src => "ppccpuid.s ppccap.c",
aes_asm_src => "aes_core.c aes_cbc.c aes-ppc.s vpaes-ppc.s aesp8-ppc.s",
sha1_asm_src => "sha1-ppc.s sha256-ppc.s sha512-ppc.s sha256p8-ppc.s sha512p8-ppc.s",
modes_asm_src => "ghashp8-ppc.s",

1
Configurations/10-main.conf
View file

@ -949,7 +949,6 @@ my %targets = (
cppflags => combine("-DOPENSSL_SMALL_FOOTPRINT",
threads("-D_REENTRANT")),
bn_ops => "BN_LLONG",
cpuid_asm_src => "c64xpluscpuid.s",
aes_asm_src => "aes-c64xplus.s aes_cbc.c aes-ctr.fake",
sha1_asm_src => "sha1-c64xplus.s sha256-c64xplus.s sha512-c64xplus.s",
rc4_asm_src => "rc4-c64xplus.s",

27
Configurations/90-team.norelease.conf
View file

@ -56,33 +56,6 @@ my %targets = (
thread_scheme => "pthreads",
dso_scheme => "dlfcn",
},
"debug-linux-ia32-aes" => {
inherit_from => [ 'BASE_unix' ],
cc => "gcc",
cflags => combine("-DL_ENDIAN -O3 -fomit-frame-pointer -Wall",
threads("-D_REENTRANT")),
ex_libs => add(" ","-ldl"),
bn_ops => "BN_LLONG",
cpuid_asm_src => "x86cpuid.s",
bn_asm_src => "bn-586.s co-586.s x86-mont.s",
des_asm_src => "des-586.s crypt586.s",
aes_asm_src => "aes_x86core.s aes_cbc.s aesni-x86.s",
bf_asm_src => "bf-586.s",
md5_asm_src => "md5-586.s",
sha1_asm_src => "sha1-586.s sha256-586.s sha512-586.s",
cast_asm_src => "cast-586.s",
rc4_asm_src => "rc4-586.s",
rmd160_asm_src => "rmd-586.s",
rc5_asm_src => "rc5-586.s",
wp_asm_src => "wp_block.s wp-mmx.s",
modes_asm_src => "ghash-x86.s",
padlock_asm_src => "e_padlock-x86.s",
thread_scheme => "pthreads",
perlasm_scheme => "elf",
dso_scheme => "dlfcn",
shared_target => "linux-shared",
shared_cflag => "-fPIC",
},
"debug-test-64-clang" => {
inherit_from => [ 'BASE_unix', "x86_64_asm" ],
cc => "clang",

3
Configurations/README
View file

@ -240,9 +240,6 @@ In each table entry, the following keys are significant:
export vars as
accessor functions.
cpuid_asm_src => assembler implementation of cpuid code as
well as OPENSSL_cleanse().
Default to mem_clr.c
ec_asm_src => Assembler implementation of core EC
functions.
des_asm_src => Assembler implementation of core DES

7
Configure
View file

@ -1404,12 +1404,6 @@ if ($target{sys_id} ne "")
}
unless ($disabled{asm}) {
$target{cpuid_asm_src}=$table{DEFAULTS}->{cpuid_asm_src} if ($config{processor} eq "386");
if ($target{cpuid_asm_src} ne "mem_clr.c") {
push @{$config{lib_defines}}, "OPENSSL_CPUID_OBJ";
push @{$config{module_defines}}, "OPENSSL_CPUID_OBJ";
}
if ($target{sha1_asm_src}) {
push @{$config{lib_defines}}, "SHA1_ASM" if ($target{sha1_asm_src} =~ /sx86/ || $target{sha1_asm_src} =~ /sha1/);
push @{$config{lib_defines}}, "SHA256_ASM" if ($target{sha1_asm_src} =~ /sha256/);
@ -3404,7 +3398,6 @@ sub print_table_entry
"loutflag",
"ex_libs",
"bn_ops",
"cpuid_asm_src",
"ec_asm_src",
"des_asm_src",
"aes_asm_src",

41
crypto/build.info
View file

@ -23,6 +23,41 @@ IF[{- !$disabled{uplink} -}]
ENDIF
ENDIF
$CPUIDASM=mem_clr.c
$CPUIDDEF=
IF[{- !$disabled{asm} && $config{processor} ne '386' -}]
$CPUIDASM_x86=x86cpuid.s
$CPUIDASM_x86_64=x86_64cpuid.s
$CPUIDASM_ia64=ia64cpuid.s
$CPUIDASM_sparcv9=sparcv9cap.c sparccpuid.S
$CPUIDASM_alpha=alphacpuid.s
$CPUIDASM_s390x=s390xcap.c s390xcpuid.S
$CPUIDASM_armv4=armcap.c armv4cpuid.S
$CPUIDASM_aarch64=armcap.c arm64cpuid.S
$CPUIDASM_parisc11=pariscid.s
$CPUIDASM_parisc20_64=$CPUIDASM_parisc11
$CPUIDASM_ppc32=ppccpuid.s ppccap.c
$CPUIDASM_ppc64=$CPUIDASM_ppc32
$CPUIDASM_c64xplus=c64xpluscpuid.s
# Now that we have defined all the arch specific variables, use the
# appropriate one, and define the appropriate macros
IF[$CPUIDASM_{- $target{asm_arch} -}]
$CPUIDASM=$CPUIDASM_{- $target{asm_arch} -}
$CPUIDDEF=OPENSSL_CPUID_OBJ
ENDIF
ENDIF
# The Core
$CORE_COMMON=provider_core.c provider_predefined.c core_fetch.c core_namemap.c
@ -33,14 +68,16 @@ SOURCE[../providers/fips]=$CORE_COMMON
$UTIL_COMMON=\
cryptlib.c mem.c mem_sec.c params.c bsearch.c ex_data.c o_str.c \
ctype.c threads_pthread.c threads_win.c threads_none.c context.c \
sparse_array.c {- $target{cpuid_asm_src} -}
sparse_array.c $CPUIDASM
$UTIL_DEFINE=$CPUIDDEF
SOURCE[../libcrypto]=$UTIL_COMMON \
mem_dbg.c cversion.c info.c cpt_err.c ebcdic.c uid.c o_time.c o_dir.c \
o_fopen.c getenv.c o_init.c o_fips.c init.c trace.c provider.c \
$UPLINKSRC
DEFINE[../libcrypto]=$UPLINKDEF
DEFINE[../libcrypto]=$UTIL_DEFINE $UPLINKDEF
SOURCE[../providers/fips]=$UTIL_COMMON
DEFINE[../providers/fips]=$UTIL_DEFINE