Move cpuid_asm_src file information to build.info files
Also took away the internal 'debug-linux-ia32-aes' config target, as it's broken (refers to files that no longer exist). Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/9166)
This commit is contained in:
parent
d9dfeb940c
commit
6e1ba47219
6 changed files with 39 additions and 52 deletions
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@ -14,7 +14,6 @@ my %targets=(
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thread_scheme => "(unknown)", # Assume we don't know
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thread_scheme => "(unknown)", # Assume we don't know
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thread_defines => [],
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thread_defines => [],
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cpuid_asm_src => "mem_clr.c",
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ec_asm_src => "",
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ec_asm_src => "",
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des_asm_src => "des_enc.c fcrypt_b.c",
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des_asm_src => "des_enc.c fcrypt_b.c",
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aes_asm_src => "aes_core.c aes_cbc.c",
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aes_asm_src => "aes_core.c aes_cbc.c",
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@ -167,7 +166,6 @@ my %targets=(
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x86_asm => {
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x86_asm => {
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template => 1,
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template => 1,
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cpuid_asm_src => "x86cpuid.s",
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ec_asm_src => "ecp_nistz256.c ecp_nistz256-x86.s",
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ec_asm_src => "ecp_nistz256.c ecp_nistz256-x86.s",
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des_asm_src => "des-586.s crypt586.s",
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des_asm_src => "des-586.s crypt586.s",
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aes_asm_src => "aes-586.s vpaes-x86.s aesni-x86.s",
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aes_asm_src => "aes-586.s vpaes-x86.s aesni-x86.s",
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@ -191,7 +189,6 @@ my %targets=(
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},
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},
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x86_64_asm => {
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x86_64_asm => {
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template => 1,
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template => 1,
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cpuid_asm_src => "x86_64cpuid.s",
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ec_asm_src => "ecp_nistz256.c ecp_nistz256-x86_64.s x25519-x86_64.s",
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ec_asm_src => "ecp_nistz256.c ecp_nistz256-x86_64.s x25519-x86_64.s",
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aes_asm_src => "aes-x86_64.s vpaes-x86_64.s bsaes-x86_64.s aesni-x86_64.s aesni-sha1-x86_64.s aesni-sha256-x86_64.s aesni-mb-x86_64.s",
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aes_asm_src => "aes-x86_64.s vpaes-x86_64.s bsaes-x86_64.s aesni-x86_64.s aesni-sha1-x86_64.s aesni-sha256-x86_64.s aesni-mb-x86_64.s",
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md5_asm_src => "md5-x86_64.s",
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md5_asm_src => "md5-x86_64.s",
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@ -207,7 +204,6 @@ my %targets=(
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},
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},
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ia64_asm => {
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ia64_asm => {
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template => 1,
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template => 1,
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cpuid_asm_src => "ia64cpuid.s",
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aes_asm_src => "aes_core.c aes_cbc.c aes-ia64.s",
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aes_asm_src => "aes_core.c aes_cbc.c aes-ia64.s",
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sha1_asm_src => "sha1-ia64.s sha256-ia64.s sha512-ia64.s",
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sha1_asm_src => "sha1-ia64.s sha256-ia64.s sha512-ia64.s",
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modes_asm_src => "ghash-ia64.s",
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modes_asm_src => "ghash-ia64.s",
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@ -216,7 +212,6 @@ my %targets=(
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},
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},
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sparcv9_asm => {
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sparcv9_asm => {
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template => 1,
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template => 1,
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cpuid_asm_src => "sparcv9cap.c sparccpuid.S",
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ec_asm_src => "ecp_nistz256.c ecp_nistz256-sparcv9.S",
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ec_asm_src => "ecp_nistz256.c ecp_nistz256-sparcv9.S",
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des_asm_src => "des_enc-sparc.S fcrypt_b.c dest4-sparcv9.S",
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des_asm_src => "des_enc-sparc.S fcrypt_b.c dest4-sparcv9.S",
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aes_asm_src => "aes_core.c aes_cbc.c aes-sparcv9.S aest4-sparcv9.S aesfx-sparcv9.S",
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aes_asm_src => "aes_core.c aes_cbc.c aes-sparcv9.S aest4-sparcv9.S aesfx-sparcv9.S",
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@ -228,12 +223,10 @@ my %targets=(
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},
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},
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sparcv8_asm => {
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sparcv8_asm => {
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template => 1,
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template => 1,
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cpuid_asm_src => "",
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des_asm_src => "des_enc-sparc.S fcrypt_b.c",
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des_asm_src => "des_enc-sparc.S fcrypt_b.c",
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},
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},
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alpha_asm => {
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alpha_asm => {
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template => 1,
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template => 1,
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cpuid_asm_src => "alphacpuid.s",
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sha1_asm_src => "sha1-alpha.S",
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sha1_asm_src => "sha1-alpha.S",
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modes_asm_src => "ghash-alpha.S",
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modes_asm_src => "ghash-alpha.S",
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},
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},
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@ -250,7 +243,6 @@ my %targets=(
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},
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},
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s390x_asm => {
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s390x_asm => {
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template => 1,
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template => 1,
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cpuid_asm_src => "s390xcap.c s390xcpuid.S",
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aes_asm_src => "aes-s390x.S aes-ctr.fake aes-xts.fake",
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aes_asm_src => "aes-s390x.S aes-ctr.fake aes-xts.fake",
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sha1_asm_src => "sha1-s390x.S sha256-s390x.S sha512-s390x.S",
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sha1_asm_src => "sha1-s390x.S sha256-s390x.S sha512-s390x.S",
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rc4_asm_src => "rc4-s390x.s",
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rc4_asm_src => "rc4-s390x.s",
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@ -261,7 +253,6 @@ my %targets=(
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},
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},
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armv4_asm => {
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armv4_asm => {
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template => 1,
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template => 1,
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cpuid_asm_src => "armcap.c armv4cpuid.S",
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ec_asm_src => "ecp_nistz256.c ecp_nistz256-armv4.S",
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ec_asm_src => "ecp_nistz256.c ecp_nistz256-armv4.S",
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aes_asm_src => "aes_cbc.c aes-armv4.S bsaes-armv7.S aesv8-armx.S",
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aes_asm_src => "aes_cbc.c aes-armv4.S bsaes-armv7.S aesv8-armx.S",
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sha1_asm_src => "sha1-armv4-large.S sha256-armv4.S sha512-armv4.S",
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sha1_asm_src => "sha1-armv4-large.S sha256-armv4.S sha512-armv4.S",
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@ -272,7 +263,6 @@ my %targets=(
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},
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},
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aarch64_asm => {
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aarch64_asm => {
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template => 1,
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template => 1,
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cpuid_asm_src => "armcap.c arm64cpuid.S",
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ec_asm_src => "ecp_nistz256.c ecp_nistz256-armv8.S",
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ec_asm_src => "ecp_nistz256.c ecp_nistz256-armv8.S",
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aes_asm_src => "aes_core.c aes_cbc.c aesv8-armx.S vpaes-armv8.S",
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aes_asm_src => "aes_core.c aes_cbc.c aesv8-armx.S vpaes-armv8.S",
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sha1_asm_src => "sha1-armv8.S sha256-armv8.S sha512-armv8.S",
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sha1_asm_src => "sha1-armv8.S sha256-armv8.S sha512-armv8.S",
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@ -283,7 +273,6 @@ my %targets=(
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},
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},
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parisc11_asm => {
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parisc11_asm => {
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template => 1,
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template => 1,
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cpuid_asm_src => "pariscid.s",
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aes_asm_src => "aes_core.c aes_cbc.c aes-parisc.s",
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aes_asm_src => "aes_core.c aes_cbc.c aes-parisc.s",
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sha1_asm_src => "sha1-parisc.s sha256-parisc.s sha512-parisc.s",
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sha1_asm_src => "sha1-parisc.s sha256-parisc.s sha512-parisc.s",
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rc4_asm_src => "rc4-parisc.s",
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rc4_asm_src => "rc4-parisc.s",
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@ -295,7 +284,6 @@ my %targets=(
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},
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},
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ppc32_asm => {
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ppc32_asm => {
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template => 1,
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template => 1,
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cpuid_asm_src => "ppccpuid.s ppccap.c",
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aes_asm_src => "aes_core.c aes_cbc.c aes-ppc.s vpaes-ppc.s aesp8-ppc.s",
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aes_asm_src => "aes_core.c aes_cbc.c aes-ppc.s vpaes-ppc.s aesp8-ppc.s",
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sha1_asm_src => "sha1-ppc.s sha256-ppc.s sha512-ppc.s sha256p8-ppc.s sha512p8-ppc.s",
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sha1_asm_src => "sha1-ppc.s sha256-ppc.s sha512-ppc.s sha256p8-ppc.s sha512p8-ppc.s",
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modes_asm_src => "ghashp8-ppc.s",
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modes_asm_src => "ghashp8-ppc.s",
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@ -949,7 +949,6 @@ my %targets = (
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cppflags => combine("-DOPENSSL_SMALL_FOOTPRINT",
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cppflags => combine("-DOPENSSL_SMALL_FOOTPRINT",
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threads("-D_REENTRANT")),
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threads("-D_REENTRANT")),
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bn_ops => "BN_LLONG",
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bn_ops => "BN_LLONG",
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cpuid_asm_src => "c64xpluscpuid.s",
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aes_asm_src => "aes-c64xplus.s aes_cbc.c aes-ctr.fake",
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aes_asm_src => "aes-c64xplus.s aes_cbc.c aes-ctr.fake",
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sha1_asm_src => "sha1-c64xplus.s sha256-c64xplus.s sha512-c64xplus.s",
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sha1_asm_src => "sha1-c64xplus.s sha256-c64xplus.s sha512-c64xplus.s",
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rc4_asm_src => "rc4-c64xplus.s",
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rc4_asm_src => "rc4-c64xplus.s",
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@ -56,33 +56,6 @@ my %targets = (
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thread_scheme => "pthreads",
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thread_scheme => "pthreads",
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dso_scheme => "dlfcn",
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dso_scheme => "dlfcn",
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},
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},
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"debug-linux-ia32-aes" => {
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inherit_from => [ 'BASE_unix' ],
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cc => "gcc",
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cflags => combine("-DL_ENDIAN -O3 -fomit-frame-pointer -Wall",
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threads("-D_REENTRANT")),
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ex_libs => add(" ","-ldl"),
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bn_ops => "BN_LLONG",
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cpuid_asm_src => "x86cpuid.s",
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bn_asm_src => "bn-586.s co-586.s x86-mont.s",
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des_asm_src => "des-586.s crypt586.s",
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aes_asm_src => "aes_x86core.s aes_cbc.s aesni-x86.s",
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bf_asm_src => "bf-586.s",
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md5_asm_src => "md5-586.s",
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sha1_asm_src => "sha1-586.s sha256-586.s sha512-586.s",
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cast_asm_src => "cast-586.s",
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rc4_asm_src => "rc4-586.s",
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rmd160_asm_src => "rmd-586.s",
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rc5_asm_src => "rc5-586.s",
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wp_asm_src => "wp_block.s wp-mmx.s",
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modes_asm_src => "ghash-x86.s",
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padlock_asm_src => "e_padlock-x86.s",
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thread_scheme => "pthreads",
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perlasm_scheme => "elf",
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dso_scheme => "dlfcn",
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shared_target => "linux-shared",
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shared_cflag => "-fPIC",
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},
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"debug-test-64-clang" => {
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"debug-test-64-clang" => {
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inherit_from => [ 'BASE_unix', "x86_64_asm" ],
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inherit_from => [ 'BASE_unix', "x86_64_asm" ],
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cc => "clang",
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cc => "clang",
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@ -240,9 +240,6 @@ In each table entry, the following keys are significant:
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export vars as
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export vars as
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accessor functions.
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accessor functions.
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cpuid_asm_src => assembler implementation of cpuid code as
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well as OPENSSL_cleanse().
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Default to mem_clr.c
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ec_asm_src => Assembler implementation of core EC
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ec_asm_src => Assembler implementation of core EC
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functions.
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functions.
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des_asm_src => Assembler implementation of core DES
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des_asm_src => Assembler implementation of core DES
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@ -1404,12 +1404,6 @@ if ($target{sys_id} ne "")
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}
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}
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unless ($disabled{asm}) {
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unless ($disabled{asm}) {
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$target{cpuid_asm_src}=$table{DEFAULTS}->{cpuid_asm_src} if ($config{processor} eq "386");
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if ($target{cpuid_asm_src} ne "mem_clr.c") {
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push @{$config{lib_defines}}, "OPENSSL_CPUID_OBJ";
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push @{$config{module_defines}}, "OPENSSL_CPUID_OBJ";
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}
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if ($target{sha1_asm_src}) {
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if ($target{sha1_asm_src}) {
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push @{$config{lib_defines}}, "SHA1_ASM" if ($target{sha1_asm_src} =~ /sx86/ || $target{sha1_asm_src} =~ /sha1/);
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push @{$config{lib_defines}}, "SHA1_ASM" if ($target{sha1_asm_src} =~ /sx86/ || $target{sha1_asm_src} =~ /sha1/);
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push @{$config{lib_defines}}, "SHA256_ASM" if ($target{sha1_asm_src} =~ /sha256/);
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push @{$config{lib_defines}}, "SHA256_ASM" if ($target{sha1_asm_src} =~ /sha256/);
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@ -3404,7 +3398,6 @@ sub print_table_entry
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"loutflag",
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"loutflag",
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"ex_libs",
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"ex_libs",
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"bn_ops",
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"bn_ops",
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"cpuid_asm_src",
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"ec_asm_src",
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"ec_asm_src",
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"des_asm_src",
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"des_asm_src",
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"aes_asm_src",
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"aes_asm_src",
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@ -23,6 +23,41 @@ IF[{- !$disabled{uplink} -}]
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ENDIF
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ENDIF
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ENDIF
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ENDIF
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$CPUIDASM=mem_clr.c
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$CPUIDDEF=
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IF[{- !$disabled{asm} && $config{processor} ne '386' -}]
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$CPUIDASM_x86=x86cpuid.s
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$CPUIDASM_x86_64=x86_64cpuid.s
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$CPUIDASM_ia64=ia64cpuid.s
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$CPUIDASM_sparcv9=sparcv9cap.c sparccpuid.S
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$CPUIDASM_alpha=alphacpuid.s
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$CPUIDASM_s390x=s390xcap.c s390xcpuid.S
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$CPUIDASM_armv4=armcap.c armv4cpuid.S
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$CPUIDASM_aarch64=armcap.c arm64cpuid.S
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$CPUIDASM_parisc11=pariscid.s
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$CPUIDASM_parisc20_64=$CPUIDASM_parisc11
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$CPUIDASM_ppc32=ppccpuid.s ppccap.c
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$CPUIDASM_ppc64=$CPUIDASM_ppc32
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$CPUIDASM_c64xplus=c64xpluscpuid.s
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# Now that we have defined all the arch specific variables, use the
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# appropriate one, and define the appropriate macros
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IF[$CPUIDASM_{- $target{asm_arch} -}]
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$CPUIDASM=$CPUIDASM_{- $target{asm_arch} -}
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$CPUIDDEF=OPENSSL_CPUID_OBJ
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ENDIF
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ENDIF
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# The Core
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# The Core
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$CORE_COMMON=provider_core.c provider_predefined.c core_fetch.c core_namemap.c
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$CORE_COMMON=provider_core.c provider_predefined.c core_fetch.c core_namemap.c
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@ -33,14 +68,16 @@ SOURCE[../providers/fips]=$CORE_COMMON
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$UTIL_COMMON=\
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$UTIL_COMMON=\
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cryptlib.c mem.c mem_sec.c params.c bsearch.c ex_data.c o_str.c \
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cryptlib.c mem.c mem_sec.c params.c bsearch.c ex_data.c o_str.c \
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ctype.c threads_pthread.c threads_win.c threads_none.c context.c \
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ctype.c threads_pthread.c threads_win.c threads_none.c context.c \
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sparse_array.c {- $target{cpuid_asm_src} -}
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sparse_array.c $CPUIDASM
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$UTIL_DEFINE=$CPUIDDEF
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SOURCE[../libcrypto]=$UTIL_COMMON \
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SOURCE[../libcrypto]=$UTIL_COMMON \
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mem_dbg.c cversion.c info.c cpt_err.c ebcdic.c uid.c o_time.c o_dir.c \
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mem_dbg.c cversion.c info.c cpt_err.c ebcdic.c uid.c o_time.c o_dir.c \
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o_fopen.c getenv.c o_init.c o_fips.c init.c trace.c provider.c \
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o_fopen.c getenv.c o_init.c o_fips.c init.c trace.c provider.c \
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$UPLINKSRC
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$UPLINKSRC
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DEFINE[../libcrypto]=$UPLINKDEF
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DEFINE[../libcrypto]=$UTIL_DEFINE $UPLINKDEF
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SOURCE[../providers/fips]=$UTIL_COMMON
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SOURCE[../providers/fips]=$UTIL_COMMON
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DEFINE[../providers/fips]=$UTIL_DEFINE
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