From 7e994953c924049fa120da4d14022c4eaa3d9262 Mon Sep 17 00:00:00 2001 From: "Dr. Stephen Henson" Date: Mon, 15 Sep 2008 22:45:13 +0000 Subject: [PATCH] Changes from stable branch. --- crypto/rc4/asm/rc4-ia64.S | 5 ++--- crypto/rc4/rc4_skey.c | 7 ++++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/crypto/rc4/asm/rc4-ia64.S b/crypto/rc4/asm/rc4-ia64.S index a322d0c718..8210c47d04 100644 --- a/crypto/rc4/asm/rc4-ia64.S +++ b/crypto/rc4/asm/rc4-ia64.S @@ -75,14 +75,13 @@ yy=r31; .skip 16 RC4: .prologue - .fframe 0 .save ar.pfs,r2 - .save ar.lc,r3 - .save pr,prsave { .mii; alloc r2=ar.pfs,4,12,0,16 + .save pr,prsave mov prsave=pr ADDP key=0,in0 };; { .mib; cmp.eq p6,p0=0,in1 // len==0? + .save ar.lc,r3 mov r3=ar.lc (p6) br.ret.spnt.many b0 };; // emergency exit diff --git a/crypto/rc4/rc4_skey.c b/crypto/rc4/rc4_skey.c index 27bd33a189..4478d1a4b3 100644 --- a/crypto/rc4/rc4_skey.c +++ b/crypto/rc4/rc4_skey.c @@ -128,11 +128,12 @@ void RC4_set_key(RC4_KEY *key, int len, const unsigned char *data) * implementations suffer from significant performance * losses then, e.g. PIII exhibits >2x deterioration, * and so does Opteron. In order to assure optimal - * all-round performance, let us [try to] detect P4 at - * run-time by checking upon HTT bit in CPU capability + * all-round performance, we detect P4 at run-time by + * checking upon reserved bit 20 in CPU capability * vector and set up compressed key schedule, which is * recognized by correspondingly updated assembler - * module... + * module... Bit 20 is set up by OPENSSL_ia32_cpuid. + * * */ #ifdef OPENSSL_FIPS