Remove some inline assembler and non-standard constructs.
The goal is to minimize maintenance burden by eliminating somewhat obscure platform-specific tweaks that are not viewed as critical for contemporary applications. This affects Camellia and digest implementations that rely on md32_common.h, MD4, MD5, SHA1, SHA256. SHA256 is the only one that can be viewed as critical, but given the assembly coverage, the omission is considered appropriate. Reviewed-by: Rich Salz <rsalz@openssl.org> Reviewed-by: Richard Levitte <levitte@openssl.org> (Merged from https://github.com/openssl/openssl/pull/6508)
This commit is contained in:
Andy Polyakov
parent
a766aab93a
commit
9be083ad36
2 changed files with 9 additions and 167 deletions
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@ -44,51 +44,11 @@
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#include <string.h>
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#include <stdlib.h>
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/* 32-bit rotations */
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#if !defined(PEDANTIC) && !defined(OPENSSL_NO_ASM) && !defined(OPENSSL_NO_INLINE_ASM)
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# if defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_AMD64) || defined(_M_X64))
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# define RightRotate(x, s) _lrotr(x, s)
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# define LeftRotate(x, s) _lrotl(x, s)
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# if _MSC_VER >= 1400
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# define SWAP(x) _byteswap_ulong(x)
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# else
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# define SWAP(x) (_lrotl(x, 8) & 0x00ff00ff | _lrotr(x, 8) & 0xff00ff00)
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# endif
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# define GETU32(p) SWAP(*((u32 *)(p)))
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# define PUTU32(p,v) (*((u32 *)(p)) = SWAP((v)))
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# elif defined(__GNUC__) && __GNUC__>=2
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# if defined(__i386) || defined(__x86_64)
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# define RightRotate(x,s) ({u32 ret; asm ("rorl %1,%0":"=r"(ret):"I"(s),"0"(x):"cc"); ret; })
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# define LeftRotate(x,s) ({u32 ret; asm ("roll %1,%0":"=r"(ret):"I"(s),"0"(x):"cc"); ret; })
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# if defined(B_ENDIAN) /* stratus.com does it */
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# define GETU32(p) (*(u32 *)(p))
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# define PUTU32(p,v) (*(u32 *)(p)=(v))
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# else
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# define GETU32(p) ({u32 r=*(const u32 *)(p); asm("bswapl %0":"=r"(r):"0"(r)); r; })
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# define PUTU32(p,v) ({u32 r=(v); asm("bswapl %0":"=r"(r):"0"(r)); *(u32 *)(p)=r; })
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# endif
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# elif defined(_ARCH_PPC) || defined(_ARCH_PPC64) || \
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defined(__powerpc) || defined(__ppc__) || defined(__powerpc64__)
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# define LeftRotate(x,s) ({u32 ret; asm ("rlwinm %0,%1,%2,0,31":"=r"(ret):"r"(x),"I"(s)); ret; })
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# define RightRotate(x,s) LeftRotate(x,(32-s))
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# elif defined(__s390x__)
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# define LeftRotate(x,s) ({u32 ret; asm ("rll %0,%1,%2":"=r"(ret):"r"(x),"I"(s)); ret; })
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# define RightRotate(x,s) LeftRotate(x,(32-s))
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# define GETU32(p) (*(u32 *)(p))
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# define PUTU32(p,v) (*(u32 *)(p)=(v))
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# endif
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# endif
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#endif
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#define RightRotate(x, s) ( ((x) >> (s)) + ((x) << (32 - s)) )
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#define LeftRotate(x, s) ( ((x) << (s)) + ((x) >> (32 - s)) )
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#if !defined(RightRotate) && !defined(LeftRotate)
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# define RightRotate(x, s) ( ((x) >> (s)) + ((x) << (32 - s)) )
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# define LeftRotate(x, s) ( ((x) << (s)) + ((x) >> (32 - s)) )
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#endif
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#if !defined(GETU32) && !defined(PUTU32)
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# define GETU32(p) (((u32)(p)[0] << 24) ^ ((u32)(p)[1] << 16) ^ ((u32)(p)[2] << 8) ^ ((u32)(p)[3]))
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# define PUTU32(p,v) ((p)[0] = (u8)((v) >> 24), (p)[1] = (u8)((v) >> 16), (p)[2] = (u8)((v) >> 8), (p)[3] = (u8)(v))
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#endif
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#define GETU32(p) (((u32)(p)[0] << 24) ^ ((u32)(p)[1] << 16) ^ ((u32)(p)[2] << 8) ^ ((u32)(p)[3]))
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#define PUTU32(p,v) ((p)[0] = (u8)((v) >> 24), (p)[1] = (u8)((v) >> 16), (p)[2] = (u8)((v) >> 8), (p)[3] = (u8)(v))
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/* S-box data */
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#define SBOX1_1110 Camellia_SBOX[0]
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@ -93,149 +93,31 @@
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# error "HASH_BLOCK_DATA_ORDER must be defined!"
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#endif
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/*
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* Engage compiler specific rotate intrinsic function if available.
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*/
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#undef ROTATE
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#ifndef PEDANTIC
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# if defined(_MSC_VER)
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# define ROTATE(a,n) _lrotl(a,n)
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# elif defined(__ICC)
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# define ROTATE(a,n) _rotl(a,n)
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# elif defined(__GNUC__) && __GNUC__>=2 && !defined(OPENSSL_NO_ASM) && !defined(OPENSSL_NO_INLINE_ASM)
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/*
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* Some GNU C inline assembler templates. Note that these are
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* rotates by *constant* number of bits! But that's exactly
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* what we need here...
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*/
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# if defined(__i386) || defined(__i386__) || defined(__x86_64) || defined(__x86_64__)
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# define ROTATE(a,n) ({ register unsigned int ret; \
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asm ( \
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"roll %1,%0" \
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: "=r"(ret) \
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: "I"(n), "0"((unsigned int)(a)) \
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: "cc"); \
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ret; \
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})
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# elif defined(_ARCH_PPC) || defined(_ARCH_PPC64) || \
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defined(__powerpc) || defined(__ppc__) || defined(__powerpc64__)
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# define ROTATE(a,n) ({ register unsigned int ret; \
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asm ( \
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"rlwinm %0,%1,%2,0,31" \
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: "=r"(ret) \
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: "r"(a), "I"(n)); \
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ret; \
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})
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# elif defined(__s390x__)
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# define ROTATE(a,n) ({ register unsigned int ret; \
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asm ("rll %0,%1,%2" \
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: "=r"(ret) \
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: "r"(a), "I"(n)); \
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ret; \
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})
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# endif
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# endif
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#endif /* PEDANTIC */
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#ifndef ROTATE
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# define ROTATE(a,n) (((a)<<(n))|(((a)&0xffffffff)>>(32-(n))))
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#endif
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#define ROTATE(a,n) (((a)<<(n))|(((a)&0xffffffff)>>(32-(n))))
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#if defined(DATA_ORDER_IS_BIG_ENDIAN)
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# ifndef PEDANTIC
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# if defined(__GNUC__) && __GNUC__>=2 && !defined(OPENSSL_NO_ASM) && !defined(OPENSSL_NO_INLINE_ASM)
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# if ((defined(__i386) || defined(__i386__)) && !defined(I386_ONLY)) || \
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(defined(__x86_64) || defined(__x86_64__))
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# if !defined(B_ENDIAN)
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/*
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* This gives ~30-40% performance improvement in SHA-256 compiled
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* with gcc [on P4]. Well, first macro to be frank. We can pull
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* this trick on x86* platforms only, because these CPUs can fetch
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* unaligned data without raising an exception.
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*/
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# define HOST_c2l(c,l) ({ unsigned int r=*((const unsigned int *)(c)); \
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asm ("bswapl %0":"=r"(r):"0"(r)); \
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(c)+=4; (l)=r; })
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# define HOST_l2c(l,c) ({ unsigned int r=(l); \
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asm ("bswapl %0":"=r"(r):"0"(r)); \
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*((unsigned int *)(c))=r; (c)+=4; r; })
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# endif
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# elif defined(__aarch64__)
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# if defined(__BYTE_ORDER__)
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# if defined(__ORDER_LITTLE_ENDIAN__) && __BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__
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# define HOST_c2l(c,l) ({ unsigned int r; \
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asm ("rev %w0,%w1" \
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:"=r"(r) \
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:"r"(*((const unsigned int *)(c))));\
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(c)+=4; (l)=r; })
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# define HOST_l2c(l,c) ({ unsigned int r; \
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asm ("rev %w0,%w1" \
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:"=r"(r) \
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:"r"((unsigned int)(l)));\
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*((unsigned int *)(c))=r; (c)+=4; r; })
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# elif defined(__ORDER_BIG_ENDIAN__) && __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
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# define HOST_c2l(c,l) ((l)=*((const unsigned int *)(c)), (c)+=4, (l))
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# define HOST_l2c(l,c) (*((unsigned int *)(c))=(l), (c)+=4, (l))
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# endif
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# endif
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# endif
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# endif
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# if defined(__s390__) || defined(__s390x__)
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# define HOST_c2l(c,l) ((l)=*((const unsigned int *)(c)), (c)+=4, (l))
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# define HOST_l2c(l,c) (*((unsigned int *)(c))=(l), (c)+=4, (l))
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# endif
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# endif
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# ifndef HOST_c2l
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# define HOST_c2l(c,l) (l =(((unsigned long)(*((c)++)))<<24), \
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# define HOST_c2l(c,l) (l =(((unsigned long)(*((c)++)))<<24), \
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l|=(((unsigned long)(*((c)++)))<<16), \
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l|=(((unsigned long)(*((c)++)))<< 8), \
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l|=(((unsigned long)(*((c)++))) ) )
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# endif
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# ifndef HOST_l2c
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# define HOST_l2c(l,c) (*((c)++)=(unsigned char)(((l)>>24)&0xff), \
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# define HOST_l2c(l,c) (*((c)++)=(unsigned char)(((l)>>24)&0xff), \
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*((c)++)=(unsigned char)(((l)>>16)&0xff), \
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*((c)++)=(unsigned char)(((l)>> 8)&0xff), \
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*((c)++)=(unsigned char)(((l) )&0xff), \
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l)
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# endif
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#elif defined(DATA_ORDER_IS_LITTLE_ENDIAN)
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# ifndef PEDANTIC
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# if defined(__GNUC__) && __GNUC__>=2 && !defined(OPENSSL_NO_ASM) && !defined(OPENSSL_NO_INLINE_ASM)
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# if defined(__s390x__)
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# define HOST_c2l(c,l) ({ asm ("lrv %0,%1" \
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:"=d"(l) :"m"(*(const unsigned int *)(c)));\
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(c)+=4; (l); })
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# define HOST_l2c(l,c) ({ asm ("strv %1,%0" \
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:"=m"(*(unsigned int *)(c)) :"d"(l));\
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(c)+=4; (l); })
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# endif
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# endif
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# if defined(__i386) || defined(__i386__) || defined(__x86_64) || defined(__x86_64__)
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# ifndef B_ENDIAN
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/* See comment in DATA_ORDER_IS_BIG_ENDIAN section. */
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# define HOST_c2l(c,l) ((l)=*((const unsigned int *)(c)), (c)+=4, l)
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# define HOST_l2c(l,c) (*((unsigned int *)(c))=(l), (c)+=4, l)
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# endif
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# endif
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# endif
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# ifndef HOST_c2l
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# define HOST_c2l(c,l) (l =(((unsigned long)(*((c)++))) ), \
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# define HOST_c2l(c,l) (l =(((unsigned long)(*((c)++))) ), \
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l|=(((unsigned long)(*((c)++)))<< 8), \
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l|=(((unsigned long)(*((c)++)))<<16), \
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l|=(((unsigned long)(*((c)++)))<<24) )
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# endif
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# ifndef HOST_l2c
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# define HOST_l2c(l,c) (*((c)++)=(unsigned char)(((l) )&0xff), \
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# define HOST_l2c(l,c) (*((c)++)=(unsigned char)(((l) )&0xff), \
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*((c)++)=(unsigned char)(((l)>> 8)&0xff), \
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*((c)++)=(unsigned char)(((l)>>16)&0xff), \
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*((c)++)=(unsigned char)(((l)>>24)&0xff), \
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l)
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# endif
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#endif
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