437 lines
9.9 KiB
Raku
437 lines
9.9 KiB
Raku
#! /usr/bin/env perl
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# Copyright 2012-2016 The OpenSSL Project Authors. All Rights Reserved.
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#
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# Licensed under the OpenSSL license (the "License"). You may not use
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# this file except in compliance with the License. You can obtain a copy
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# in the file LICENSE in the source distribution or at
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# https://www.openssl.org/source/license.html
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# ====================================================================
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# Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
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# project. The module is, however, dual licensed under OpenSSL and
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# CRYPTOGAMS licenses depending on where you obtain it. For further
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# details see http://www.openssl.org/~appro/cryptogams/.
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#
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# Hardware SPARC T4 support by David S. Miller <davem@davemloft.net>.
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# ====================================================================
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# MD5 for SPARCv9, 6.9 cycles per byte on UltraSPARC, >40% faster than
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# code generated by Sun C 5.2.
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# SPARC T4 MD5 hardware achieves 3.20 cycles per byte, which is 2.1x
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# faster than software. Multi-process benchmark saturates at 12x
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# single-process result on 8-core processor, or ~11GBps per 2.85GHz
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# socket.
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$output=pop;
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open STDOUT,">$output";
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use integer;
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($ctx,$inp,$len)=("%i0","%i1","%i2"); # input arguments
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# 64-bit values
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@X=("%o0","%o1","%o2","%o3","%o4","%o5","%o7","%g1","%g2");
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$tx="%g3";
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($AB,$CD)=("%g4","%g5");
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# 32-bit values
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@V=($A,$B,$C,$D)=map("%l$_",(0..3));
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($t1,$t2,$t3,$saved_asi)=map("%l$_",(4..7));
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($shr,$shl1,$shl2)=("%i3","%i4","%i5");
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my @K=( 0xd76aa478,0xe8c7b756,0x242070db,0xc1bdceee,
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0xf57c0faf,0x4787c62a,0xa8304613,0xfd469501,
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0x698098d8,0x8b44f7af,0xffff5bb1,0x895cd7be,
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0x6b901122,0xfd987193,0xa679438e,0x49b40821,
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0xf61e2562,0xc040b340,0x265e5a51,0xe9b6c7aa,
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0xd62f105d,0x02441453,0xd8a1e681,0xe7d3fbc8,
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0x21e1cde6,0xc33707d6,0xf4d50d87,0x455a14ed,
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0xa9e3e905,0xfcefa3f8,0x676f02d9,0x8d2a4c8a,
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0xfffa3942,0x8771f681,0x6d9d6122,0xfde5380c,
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0xa4beea44,0x4bdecfa9,0xf6bb4b60,0xbebfbc70,
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0x289b7ec6,0xeaa127fa,0xd4ef3085,0x04881d05,
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0xd9d4d039,0xe6db99e5,0x1fa27cf8,0xc4ac5665,
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0xf4292244,0x432aff97,0xab9423a7,0xfc93a039,
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0x655b59c3,0x8f0ccc92,0xffeff47d,0x85845dd1,
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0x6fa87e4f,0xfe2ce6e0,0xa3014314,0x4e0811a1,
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0xf7537e82,0xbd3af235,0x2ad7d2bb,0xeb86d391, 0 );
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sub R0 {
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my ($i,$a,$b,$c,$d) = @_;
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my $rot = (7,12,17,22)[$i%4];
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my $j = ($i+1)/2;
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if ($i&1) {
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$code.=<<___;
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srlx @X[$j],$shr,@X[$j] ! align X[`$i+1`]
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and $b,$t1,$t1 ! round $i
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sllx @X[$j+1],$shl1,$tx
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add $t2,$a,$a
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sllx $tx,$shl2,$tx
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xor $d,$t1,$t1
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or $tx,@X[$j],@X[$j]
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sethi %hi(@K[$i+1]),$t2
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add $t1,$a,$a
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or $t2,%lo(@K[$i+1]),$t2
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sll $a,$rot,$t3
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add @X[$j],$t2,$t2 ! X[`$i+1`]+K[`$i+1`]
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srl $a,32-$rot,$a
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add $b,$t3,$t3
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xor $b,$c,$t1
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add $t3,$a,$a
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___
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} else {
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$code.=<<___;
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srlx @X[$j],32,$tx ! extract X[`2*$j+1`]
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and $b,$t1,$t1 ! round $i
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add $t2,$a,$a
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xor $d,$t1,$t1
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sethi %hi(@K[$i+1]),$t2
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add $t1,$a,$a
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or $t2,%lo(@K[$i+1]),$t2
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sll $a,$rot,$t3
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add $tx,$t2,$t2 ! X[`2*$j+1`]+K[`$i+1`]
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srl $a,32-$rot,$a
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add $b,$t3,$t3
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xor $b,$c,$t1
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add $t3,$a,$a
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___
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}
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}
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sub R0_1 {
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my ($i,$a,$b,$c,$d) = @_;
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my $rot = (7,12,17,22)[$i%4];
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$code.=<<___;
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srlx @X[0],32,$tx ! extract X[1]
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and $b,$t1,$t1 ! round $i
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add $t2,$a,$a
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xor $d,$t1,$t1
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sethi %hi(@K[$i+1]),$t2
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add $t1,$a,$a
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or $t2,%lo(@K[$i+1]),$t2
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sll $a,$rot,$t3
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add $tx,$t2,$t2 ! X[1]+K[`$i+1`]
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srl $a,32-$rot,$a
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add $b,$t3,$t3
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andn $b,$c,$t1
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add $t3,$a,$a
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___
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}
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sub R1 {
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my ($i,$a,$b,$c,$d) = @_;
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my $rot = (5,9,14,20)[$i%4];
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my $j = $i<31 ? (1+5*($i+1))%16 : (5+3*($i+1))%16;
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my $xi = @X[$j/2];
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$code.=<<___ if ($j&1 && ($xi=$tx));
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srlx @X[$j/2],32,$xi ! extract X[$j]
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___
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$code.=<<___;
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and $b,$d,$t3 ! round $i
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add $t2,$a,$a
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or $t3,$t1,$t1
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sethi %hi(@K[$i+1]),$t2
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add $t1,$a,$a
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or $t2,%lo(@K[$i+1]),$t2
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sll $a,$rot,$t3
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add $xi,$t2,$t2 ! X[$j]+K[`$i+1`]
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srl $a,32-$rot,$a
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add $b,$t3,$t3
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`$i<31?"andn":"xor"` $b,$c,$t1
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add $t3,$a,$a
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___
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}
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sub R2 {
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my ($i,$a,$b,$c,$d) = @_;
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my $rot = (4,11,16,23)[$i%4];
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my $j = $i<47 ? (5+3*($i+1))%16 : (0+7*($i+1))%16;
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my $xi = @X[$j/2];
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$code.=<<___ if ($j&1 && ($xi=$tx));
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srlx @X[$j/2],32,$xi ! extract X[$j]
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___
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$code.=<<___;
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add $t2,$a,$a ! round $i
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xor $b,$t1,$t1
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sethi %hi(@K[$i+1]),$t2
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add $t1,$a,$a
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or $t2,%lo(@K[$i+1]),$t2
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sll $a,$rot,$t3
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add $xi,$t2,$t2 ! X[$j]+K[`$i+1`]
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srl $a,32-$rot,$a
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add $b,$t3,$t3
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xor $b,$c,$t1
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add $t3,$a,$a
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___
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}
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sub R3 {
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my ($i,$a,$b,$c,$d) = @_;
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my $rot = (6,10,15,21)[$i%4];
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my $j = (0+7*($i+1))%16;
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my $xi = @X[$j/2];
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$code.=<<___;
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add $t2,$a,$a ! round $i
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___
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$code.=<<___ if ($j&1 && ($xi=$tx));
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srlx @X[$j/2],32,$xi ! extract X[$j]
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___
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$code.=<<___;
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orn $b,$d,$t1
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sethi %hi(@K[$i+1]),$t2
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xor $c,$t1,$t1
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or $t2,%lo(@K[$i+1]),$t2
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add $t1,$a,$a
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sll $a,$rot,$t3
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add $xi,$t2,$t2 ! X[$j]+K[`$i+1`]
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srl $a,32-$rot,$a
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add $b,$t3,$t3
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add $t3,$a,$a
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___
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}
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$code.=<<___;
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#include "sparc_arch.h"
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#ifdef __arch64__
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.register %g2,#scratch
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.register %g3,#scratch
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#endif
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.section ".text",#alloc,#execinstr
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#ifdef __PIC__
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SPARC_PIC_THUNK(%g1)
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#endif
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.globl md5_block_asm_data_order
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.align 32
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md5_block_asm_data_order:
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SPARC_LOAD_ADDRESS_LEAF(OPENSSL_sparcv9cap_P,%g1,%g5)
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ld [%g1+4],%g1 ! OPENSSL_sparcv9cap_P[1]
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andcc %g1, CFR_MD5, %g0
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be .Lsoftware
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nop
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mov 4, %g1
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andcc %o1, 0x7, %g0
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lda [%o0 + %g0]0x88, %f0 ! load context
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lda [%o0 + %g1]0x88, %f1
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add %o0, 8, %o0
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lda [%o0 + %g0]0x88, %f2
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lda [%o0 + %g1]0x88, %f3
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bne,pn %icc, .Lhwunaligned
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sub %o0, 8, %o0
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.Lhw_loop:
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ldd [%o1 + 0x00], %f8
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ldd [%o1 + 0x08], %f10
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ldd [%o1 + 0x10], %f12
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ldd [%o1 + 0x18], %f14
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ldd [%o1 + 0x20], %f16
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ldd [%o1 + 0x28], %f18
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ldd [%o1 + 0x30], %f20
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subcc %o2, 1, %o2 ! done yet?
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ldd [%o1 + 0x38], %f22
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add %o1, 0x40, %o1
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prefetch [%o1 + 63], 20
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.word 0x81b02800 ! MD5
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bne,pt SIZE_T_CC, .Lhw_loop
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nop
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.Lhwfinish:
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sta %f0, [%o0 + %g0]0x88 ! store context
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sta %f1, [%o0 + %g1]0x88
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add %o0, 8, %o0
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sta %f2, [%o0 + %g0]0x88
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sta %f3, [%o0 + %g1]0x88
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retl
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nop
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.align 8
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.Lhwunaligned:
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alignaddr %o1, %g0, %o1
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ldd [%o1 + 0x00], %f10
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.Lhwunaligned_loop:
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ldd [%o1 + 0x08], %f12
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ldd [%o1 + 0x10], %f14
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ldd [%o1 + 0x18], %f16
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ldd [%o1 + 0x20], %f18
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ldd [%o1 + 0x28], %f20
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ldd [%o1 + 0x30], %f22
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ldd [%o1 + 0x38], %f24
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subcc %o2, 1, %o2 ! done yet?
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ldd [%o1 + 0x40], %f26
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add %o1, 0x40, %o1
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prefetch [%o1 + 63], 20
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faligndata %f10, %f12, %f8
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faligndata %f12, %f14, %f10
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faligndata %f14, %f16, %f12
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faligndata %f16, %f18, %f14
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faligndata %f18, %f20, %f16
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faligndata %f20, %f22, %f18
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faligndata %f22, %f24, %f20
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faligndata %f24, %f26, %f22
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.word 0x81b02800 ! MD5
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bne,pt SIZE_T_CC, .Lhwunaligned_loop
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for %f26, %f26, %f10 ! %f10=%f26
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ba .Lhwfinish
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nop
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.align 16
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.Lsoftware:
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save %sp,-STACK_FRAME,%sp
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rd %asi,$saved_asi
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wr %g0,0x88,%asi ! ASI_PRIMARY_LITTLE
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and $inp,7,$shr
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andn $inp,7,$inp
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sll $shr,3,$shr ! *=8
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mov 56,$shl2
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ld [$ctx+0],$A
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sub $shl2,$shr,$shl2
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ld [$ctx+4],$B
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and $shl2,32,$shl1
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add $shl2,8,$shl2
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ld [$ctx+8],$C
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sub $shl2,$shl1,$shl2 ! shr+shl1+shl2==64
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ld [$ctx+12],$D
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nop
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.Loop:
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cmp $shr,0 ! was inp aligned?
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ldxa [$inp+0]%asi,@X[0] ! load little-endian input
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ldxa [$inp+8]%asi,@X[1]
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ldxa [$inp+16]%asi,@X[2]
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ldxa [$inp+24]%asi,@X[3]
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ldxa [$inp+32]%asi,@X[4]
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sllx $A,32,$AB ! pack A,B
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ldxa [$inp+40]%asi,@X[5]
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sllx $C,32,$CD ! pack C,D
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ldxa [$inp+48]%asi,@X[6]
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or $B,$AB,$AB
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ldxa [$inp+56]%asi,@X[7]
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or $D,$CD,$CD
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bnz,a,pn %icc,.+8
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ldxa [$inp+64]%asi,@X[8]
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srlx @X[0],$shr,@X[0] ! align X[0]
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sllx @X[1],$shl1,$tx
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sethi %hi(@K[0]),$t2
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sllx $tx,$shl2,$tx
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or $t2,%lo(@K[0]),$t2
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or $tx,@X[0],@X[0]
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xor $C,$D,$t1
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add @X[0],$t2,$t2 ! X[0]+K[0]
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___
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for ($i=0;$i<15;$i++) { &R0($i,@V); unshift(@V,pop(@V)); }
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for (;$i<16;$i++) { &R0_1($i,@V); unshift(@V,pop(@V)); }
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for (;$i<32;$i++) { &R1($i,@V); unshift(@V,pop(@V)); }
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for (;$i<48;$i++) { &R2($i,@V); unshift(@V,pop(@V)); }
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for (;$i<64;$i++) { &R3($i,@V); unshift(@V,pop(@V)); }
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$code.=<<___;
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srlx $AB,32,$t1 ! unpack A,B,C,D and accumulate
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add $inp,64,$inp ! advance inp
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srlx $CD,32,$t2
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add $t1,$A,$A
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subcc $len,1,$len ! done yet?
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add $AB,$B,$B
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add $t2,$C,$C
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add $CD,$D,$D
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srl $B,0,$B ! clruw $B
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bne SIZE_T_CC,.Loop
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srl $D,0,$D ! clruw $D
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st $A,[$ctx+0] ! write out ctx
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st $B,[$ctx+4]
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st $C,[$ctx+8]
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st $D,[$ctx+12]
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wr %g0,$saved_asi,%asi
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ret
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restore
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.type md5_block_asm_data_order,#function
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.size md5_block_asm_data_order,(.-md5_block_asm_data_order)
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.asciz "MD5 block transform for SPARCv9, CRYPTOGAMS by <appro\@openssl.org>"
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.align 4
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___
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# Purpose of these subroutines is to explicitly encode VIS instructions,
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# so that one can compile the module without having to specify VIS
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# extensions on compiler command line, e.g. -xarch=v9 vs. -xarch=v9a.
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# Idea is to reserve for option to produce "universal" binary and let
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# programmer detect if current CPU is VIS capable at run-time.
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sub unvis {
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my ($mnemonic,$rs1,$rs2,$rd)=@_;
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my $ref,$opf;
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my %visopf = ( "faligndata" => 0x048,
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"for" => 0x07c );
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$ref = "$mnemonic\t$rs1,$rs2,$rd";
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if ($opf=$visopf{$mnemonic}) {
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foreach ($rs1,$rs2,$rd) {
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return $ref if (!/%f([0-9]{1,2})/);
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$_=$1;
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if ($1>=32) {
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return $ref if ($1&1);
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# re-encode for upper double register addressing
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$_=($1|$1>>5)&31;
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}
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}
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return sprintf ".word\t0x%08x !%s",
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0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
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$ref;
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} else {
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return $ref;
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}
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}
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sub unalignaddr {
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my ($mnemonic,$rs1,$rs2,$rd)=@_;
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my %bias = ( "g" => 0, "o" => 8, "l" => 16, "i" => 24 );
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my $ref="$mnemonic\t$rs1,$rs2,$rd";
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foreach ($rs1,$rs2,$rd) {
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if (/%([goli])([0-7])/) { $_=$bias{$1}+$2; }
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else { return $ref; }
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}
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return sprintf ".word\t0x%08x !%s",
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0x81b00300|$rd<<25|$rs1<<14|$rs2,
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$ref;
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}
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foreach (split("\n",$code)) {
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s/\`([^\`]*)\`/eval $1/ge;
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s/\b(f[^\s]*)\s+(%f[0-9]{1,2}),\s*(%f[0-9]{1,2}),\s*(%f[0-9]{1,2})/
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&unvis($1,$2,$3,$4)
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/ge;
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s/\b(alignaddr)\s+(%[goli][0-7]),\s*(%[goli][0-7]),\s*(%[goli][0-7])/
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&unalignaddr($1,$2,$3,$4)
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/ge;
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print $_,"\n";
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}
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close STDOUT;
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