700b814549
extra spacing and 80 cols Reviewed-by: Rich Salz <rsalz@openssl.org> Reviewed-by: Richard Levitte <levitte@openssl.org> (Merged from https://github.com/openssl/openssl/pull/1366)
317 lines
9.9 KiB
C
317 lines
9.9 KiB
C
/*
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* Copyright 2009-2016 The OpenSSL Project Authors. All Rights Reserved.
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*
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* Licensed under the OpenSSL license (the "License"). You may not use
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* this file except in compliance with the License. You can obtain a copy
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* in the file LICENSE in the source distribution or at
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* https://www.openssl.org/source/license.html
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <setjmp.h>
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#include <signal.h>
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#include <unistd.h>
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#if defined(__linux) || defined(_AIX)
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# include <sys/utsname.h>
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#endif
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#if defined(_AIX53) /* defined even on post-5.3 */
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# include <sys/systemcfg.h>
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# if !defined(__power_set)
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# define __power_set(a) (_system_configuration.implementation & (a))
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# endif
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#endif
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#include <openssl/crypto.h>
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#include <openssl/bn.h>
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#include "ppc_arch.h"
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unsigned int OPENSSL_ppccap_P = 0;
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static sigset_t all_masked;
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#ifdef OPENSSL_BN_ASM_MONT
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int bn_mul_mont(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
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const BN_ULONG *np, const BN_ULONG *n0, int num)
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{
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int bn_mul_mont_fpu64(BN_ULONG *rp, const BN_ULONG *ap,
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const BN_ULONG *bp, const BN_ULONG *np,
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const BN_ULONG *n0, int num);
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int bn_mul_mont_int(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
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const BN_ULONG *np, const BN_ULONG *n0, int num);
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if (sizeof(size_t) == 4) {
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# if 1 || (defined(__APPLE__) && defined(__MACH__))
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if (num >= 8 && (num & 3) == 0 && (OPENSSL_ppccap_P & PPC_FPU64))
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return bn_mul_mont_fpu64(rp, ap, bp, np, n0, num);
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# else
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/*
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* boundary of 32 was experimentally determined on Linux 2.6.22,
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* might have to be adjusted on AIX...
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*/
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if (num >= 32 && (num & 3) == 0 && (OPENSSL_ppccap_P & PPC_FPU64)) {
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sigset_t oset;
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int ret;
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sigprocmask(SIG_SETMASK, &all_masked, &oset);
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ret = bn_mul_mont_fpu64(rp, ap, bp, np, n0, num);
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sigprocmask(SIG_SETMASK, &oset, NULL);
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return ret;
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}
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# endif
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} else if ((OPENSSL_ppccap_P & PPC_FPU64))
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/*
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* this is a "must" on POWER6, but run-time detection is not
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* implemented yet...
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*/
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return bn_mul_mont_fpu64(rp, ap, bp, np, n0, num);
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return bn_mul_mont_int(rp, ap, bp, np, n0, num);
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}
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#endif
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void sha256_block_p8(void *ctx, const void *inp, size_t len);
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void sha256_block_ppc(void *ctx, const void *inp, size_t len);
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void sha256_block_data_order(void *ctx, const void *inp, size_t len)
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{
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OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha256_block_p8(ctx, inp, len) :
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sha256_block_ppc(ctx, inp, len);
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}
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void sha512_block_p8(void *ctx, const void *inp, size_t len);
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void sha512_block_ppc(void *ctx, const void *inp, size_t len);
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void sha512_block_data_order(void *ctx, const void *inp, size_t len)
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{
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OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha512_block_p8(ctx, inp, len) :
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sha512_block_ppc(ctx, inp, len);
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}
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#ifndef OPENSSL_NO_CHACHA
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void ChaCha20_ctr32_int(unsigned char *out, const unsigned char *inp,
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size_t len, const unsigned int key[8],
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const unsigned int counter[4]);
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void ChaCha20_ctr32_vmx(unsigned char *out, const unsigned char *inp,
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size_t len, const unsigned int key[8],
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const unsigned int counter[4]);
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void ChaCha20_ctr32(unsigned char *out, const unsigned char *inp,
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size_t len, const unsigned int key[8],
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const unsigned int counter[4])
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{
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OPENSSL_ppccap_P & PPC_ALTIVEC
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? ChaCha20_ctr32_vmx(out, inp, len, key, counter)
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: ChaCha20_ctr32_int(out, inp, len, key, counter);
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}
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#endif
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#ifndef OPENSSL_NO_POLY1305
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void poly1305_init_int(void *ctx, const unsigned char key[16]);
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void poly1305_blocks(void *ctx, const unsigned char *inp, size_t len,
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unsigned int padbit);
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void poly1305_emit(void *ctx, unsigned char mac[16],
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const unsigned int nonce[4]);
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void poly1305_init_fpu(void *ctx, const unsigned char key[16]);
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void poly1305_blocks_fpu(void *ctx, const unsigned char *inp, size_t len,
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unsigned int padbit);
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void poly1305_emit_fpu(void *ctx, unsigned char mac[16],
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const unsigned int nonce[4]);
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int poly1305_init(void *ctx, const unsigned char key[16], void *func[2])
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{
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if (sizeof(size_t) == 4 && (OPENSSL_ppccap_P & PPC_FPU)) {
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poly1305_init_fpu(ctx, key);
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func[0] = poly1305_blocks_fpu;
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func[1] = poly1305_emit_fpu;
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} else {
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poly1305_init_int(ctx, key);
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func[0] = poly1305_blocks;
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func[1] = poly1305_emit;
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}
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return 1;
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}
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#endif
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static sigjmp_buf ill_jmp;
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static void ill_handler(int sig)
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{
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siglongjmp(ill_jmp, sig);
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}
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void OPENSSL_fpu_probe(void);
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void OPENSSL_ppc64_probe(void);
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void OPENSSL_altivec_probe(void);
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void OPENSSL_crypto207_probe(void);
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void OPENSSL_madd300_probe(void);
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/*
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* Use a weak reference to getauxval() so we can use it if it is available
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* but don't break the build if it is not. Note that this is *link-time*
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* feature detection, not *run-time*. In other words if we link with
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* symbol present, it's expected to be present even at run-time.
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*/
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#if defined(__GNUC__) && __GNUC__>=2 && defined(__ELF__)
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extern unsigned long getauxval(unsigned long type) __attribute__ ((weak));
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#else
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static unsigned long (*getauxval) (unsigned long) = NULL;
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#endif
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/* I wish <sys/auxv.h> was universally available */
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#define HWCAP 16 /* AT_HWCAP */
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#define HWCAP_PPC64 (1U << 30)
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#define HWCAP_ALTIVEC (1U << 28)
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#define HWCAP_FPU (1U << 27)
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#define HWCAP_POWER6_EXT (1U << 9)
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#define HWCAP_VSX (1U << 7)
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#define HWCAP2 26 /* AT_HWCAP2 */
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#define HWCAP_VEC_CRYPTO (1U << 25)
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#define HWCAP_ARCH_3_00 (1U << 23)
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# if defined(__GNUC__) && __GNUC__>=2
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__attribute__ ((constructor))
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# endif
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void OPENSSL_cpuid_setup(void)
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{
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char *e;
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struct sigaction ill_oact, ill_act;
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sigset_t oset;
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static int trigger = 0;
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if (trigger)
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return;
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trigger = 1;
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if ((e = getenv("OPENSSL_ppccap"))) {
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OPENSSL_ppccap_P = strtoul(e, NULL, 0);
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return;
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}
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OPENSSL_ppccap_P = 0;
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#if defined(_AIX)
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OPENSSL_ppccap_P |= PPC_FPU;
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if (sizeof(size_t) == 4) {
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struct utsname uts;
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# if defined(_SC_AIX_KERNEL_BITMODE)
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if (sysconf(_SC_AIX_KERNEL_BITMODE) != 64)
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return;
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# endif
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if (uname(&uts) != 0 || atoi(uts.version) < 6)
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return;
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}
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# if defined(__power_set)
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/*
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* Value used in __power_set is a single-bit 1<<n one denoting
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* specific processor class. Incidentally 0xffffffff<<n can be
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* used to denote specific processor and its successors.
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*/
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if (sizeof(size_t) == 4) {
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/* In 32-bit case PPC_FPU64 is always fastest [if option] */
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if (__power_set(0xffffffffU<<13)) /* POWER5 and later */
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OPENSSL_ppccap_P |= PPC_FPU64;
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} else {
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/* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
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if (__power_set(0x1U<<14)) /* POWER6 */
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OPENSSL_ppccap_P |= PPC_FPU64;
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}
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if (__power_set(0xffffffffU<<14)) /* POWER6 and later */
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OPENSSL_ppccap_P |= PPC_ALTIVEC;
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if (__power_set(0xffffffffU<<16)) /* POWER8 and later */
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OPENSSL_ppccap_P |= PPC_CRYPTO207;
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if (__power_set(0xffffffffU<<17)) /* POWER9 and later */
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OPENSSL_ppccap_P |= PPC_MADD300;
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return;
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# endif
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#endif
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if (getauxval != NULL) {
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unsigned long hwcap = getauxval(HWCAP);
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if (hwcap & HWCAP_FPU) {
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OPENSSL_ppccap_P |= PPC_FPU;
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if (sizeof(size_t) == 4) {
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/* In 32-bit case PPC_FPU64 is always fastest [if option] */
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if (hwcap & HWCAP_PPC64)
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OPENSSL_ppccap_P |= PPC_FPU64;
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} else {
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/* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
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if (hwcap & HWCAP_POWER6_EXT)
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OPENSSL_ppccap_P |= PPC_FPU64;
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}
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}
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if (hwcap & HWCAP_ALTIVEC) {
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OPENSSL_ppccap_P |= PPC_ALTIVEC;
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if ((hwcap & HWCAP_VSX) && (getauxval(HWCAP2) & HWCAP_VEC_CRYPTO))
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OPENSSL_ppccap_P |= PPC_CRYPTO207;
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}
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if (hwcap & HWCAP_ARCH_3_00) {
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OPENSSL_ppccap_P |= PPC_MADD300;
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}
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return;
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}
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sigfillset(&all_masked);
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sigdelset(&all_masked, SIGILL);
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sigdelset(&all_masked, SIGTRAP);
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#ifdef SIGEMT
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sigdelset(&all_masked, SIGEMT);
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#endif
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sigdelset(&all_masked, SIGFPE);
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sigdelset(&all_masked, SIGBUS);
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sigdelset(&all_masked, SIGSEGV);
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memset(&ill_act, 0, sizeof(ill_act));
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ill_act.sa_handler = ill_handler;
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ill_act.sa_mask = all_masked;
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sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
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sigaction(SIGILL, &ill_act, &ill_oact);
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if (sigsetjmp(ill_jmp,1) == 0) {
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OPENSSL_fpu_probe();
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OPENSSL_ppccap_P |= PPC_FPU;
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if (sizeof(size_t) == 4) {
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#ifdef __linux
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struct utsname uts;
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if (uname(&uts) == 0 && strcmp(uts.machine, "ppc64") == 0)
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#endif
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if (sigsetjmp(ill_jmp, 1) == 0) {
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OPENSSL_ppc64_probe();
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OPENSSL_ppccap_P |= PPC_FPU64;
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}
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} else {
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/*
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* Wanted code detecting POWER6 CPU and setting PPC_FPU64
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*/
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}
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}
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if (sigsetjmp(ill_jmp, 1) == 0) {
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OPENSSL_altivec_probe();
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OPENSSL_ppccap_P |= PPC_ALTIVEC;
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if (sigsetjmp(ill_jmp, 1) == 0) {
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OPENSSL_crypto207_probe();
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OPENSSL_ppccap_P |= PPC_CRYPTO207;
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}
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}
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if (sigsetjmp(ill_jmp, 1) == 0) {
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OPENSSL_madd300_probe();
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OPENSSL_ppccap_P |= PPC_MADD300;
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}
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sigaction(SIGILL, &ill_oact, NULL);
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sigprocmask(SIG_SETMASK, &oset, NULL);
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}
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