45d010255f
eliminating them as dead code.
Both volatile and "memory" are used because of some concern that the compiler
may still cache values across the asm block without it, and because this was
such a painful debugging session that I wanted to ensure that it's never
repeated.
(cherry picked from commit 7753a3a684)
609 lines
13 KiB
C
609 lines
13 KiB
C
#include "../bn_lcl.h"
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#if !(defined(__GNUC__) && __GNUC__>=2)
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# include "../bn_asm.c" /* kind of dirty hack for Sun Studio */
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#else
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/*
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* x86_64 BIGNUM accelerator version 0.1, December 2002.
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*
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* Implemented by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
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* project.
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*
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* Rights for redistribution and usage in source and binary forms are
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* granted according to the OpenSSL license. Warranty of any kind is
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* disclaimed.
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*
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* Q. Version 0.1? It doesn't sound like Andy, he used to assign real
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* versions, like 1.0...
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* A. Well, that's because this code is basically a quick-n-dirty
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* proof-of-concept hack. As you can see it's implemented with
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* inline assembler, which means that you're bound to GCC and that
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* there might be enough room for further improvement.
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*
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* Q. Why inline assembler?
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* A. x86_64 features own ABI which I'm not familiar with. This is
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* why I decided to let the compiler take care of subroutine
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* prologue/epilogue as well as register allocation. For reference.
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* Win64 implements different ABI for AMD64, different from Linux.
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*
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* Q. How much faster does it get?
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* A. 'apps/openssl speed rsa dsa' output with no-asm:
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*
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* sign verify sign/s verify/s
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* rsa 512 bits 0.0006s 0.0001s 1683.8 18456.2
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* rsa 1024 bits 0.0028s 0.0002s 356.0 6407.0
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* rsa 2048 bits 0.0172s 0.0005s 58.0 1957.8
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* rsa 4096 bits 0.1155s 0.0018s 8.7 555.6
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* sign verify sign/s verify/s
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* dsa 512 bits 0.0005s 0.0006s 2100.8 1768.3
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* dsa 1024 bits 0.0014s 0.0018s 692.3 559.2
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* dsa 2048 bits 0.0049s 0.0061s 204.7 165.0
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*
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* 'apps/openssl speed rsa dsa' output with this module:
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*
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* sign verify sign/s verify/s
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* rsa 512 bits 0.0004s 0.0000s 2767.1 33297.9
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* rsa 1024 bits 0.0012s 0.0001s 867.4 14674.7
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* rsa 2048 bits 0.0061s 0.0002s 164.0 5270.0
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* rsa 4096 bits 0.0384s 0.0006s 26.1 1650.8
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* sign verify sign/s verify/s
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* dsa 512 bits 0.0002s 0.0003s 4442.2 3786.3
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* dsa 1024 bits 0.0005s 0.0007s 1835.1 1497.4
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* dsa 2048 bits 0.0016s 0.0020s 620.4 504.6
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*
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* For the reference. IA-32 assembler implementation performs
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* very much like 64-bit code compiled with no-asm on the same
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* machine.
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*/
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#if defined(_WIN64) || !defined(__LP64__)
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#define BN_ULONG unsigned long long
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#else
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#define BN_ULONG unsigned long
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#endif
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#undef mul
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#undef mul_add
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/*
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* "m"(a), "+m"(r) is the way to favor DirectPath <20>-code;
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* "g"(0) let the compiler to decide where does it
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* want to keep the value of zero;
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*/
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#define mul_add(r,a,word,carry) do { \
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register BN_ULONG high,low; \
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asm ("mulq %3" \
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: "=a"(low),"=d"(high) \
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: "a"(word),"m"(a) \
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: "cc"); \
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asm ("addq %2,%0; adcq %3,%1" \
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: "+r"(carry),"+d"(high)\
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: "a"(low),"g"(0) \
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: "cc"); \
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asm ("addq %2,%0; adcq %3,%1" \
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: "+m"(r),"+d"(high) \
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: "r"(carry),"g"(0) \
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: "cc"); \
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carry=high; \
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} while (0)
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#define mul(r,a,word,carry) do { \
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register BN_ULONG high,low; \
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asm ("mulq %3" \
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: "=a"(low),"=d"(high) \
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: "a"(word),"g"(a) \
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: "cc"); \
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asm ("addq %2,%0; adcq %3,%1" \
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: "+r"(carry),"+d"(high)\
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: "a"(low),"g"(0) \
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: "cc"); \
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(r)=carry, carry=high; \
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} while (0)
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#undef sqr
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#define sqr(r0,r1,a) \
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asm ("mulq %2" \
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: "=a"(r0),"=d"(r1) \
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: "a"(a) \
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: "cc");
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BN_ULONG bn_mul_add_words(BN_ULONG *rp, const BN_ULONG *ap, int num, BN_ULONG w)
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{
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BN_ULONG c1=0;
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if (num <= 0) return(c1);
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while (num&~3)
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{
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mul_add(rp[0],ap[0],w,c1);
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mul_add(rp[1],ap[1],w,c1);
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mul_add(rp[2],ap[2],w,c1);
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mul_add(rp[3],ap[3],w,c1);
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ap+=4; rp+=4; num-=4;
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}
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if (num)
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{
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mul_add(rp[0],ap[0],w,c1); if (--num==0) return c1;
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mul_add(rp[1],ap[1],w,c1); if (--num==0) return c1;
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mul_add(rp[2],ap[2],w,c1); return c1;
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}
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return(c1);
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}
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BN_ULONG bn_mul_words(BN_ULONG *rp, const BN_ULONG *ap, int num, BN_ULONG w)
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{
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BN_ULONG c1=0;
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if (num <= 0) return(c1);
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while (num&~3)
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{
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mul(rp[0],ap[0],w,c1);
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mul(rp[1],ap[1],w,c1);
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mul(rp[2],ap[2],w,c1);
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mul(rp[3],ap[3],w,c1);
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ap+=4; rp+=4; num-=4;
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}
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if (num)
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{
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mul(rp[0],ap[0],w,c1); if (--num == 0) return c1;
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mul(rp[1],ap[1],w,c1); if (--num == 0) return c1;
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mul(rp[2],ap[2],w,c1);
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}
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return(c1);
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}
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void bn_sqr_words(BN_ULONG *r, const BN_ULONG *a, int n)
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{
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if (n <= 0) return;
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while (n&~3)
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{
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sqr(r[0],r[1],a[0]);
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sqr(r[2],r[3],a[1]);
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sqr(r[4],r[5],a[2]);
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sqr(r[6],r[7],a[3]);
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a+=4; r+=8; n-=4;
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}
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if (n)
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{
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sqr(r[0],r[1],a[0]); if (--n == 0) return;
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sqr(r[2],r[3],a[1]); if (--n == 0) return;
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sqr(r[4],r[5],a[2]);
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}
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}
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BN_ULONG bn_div_words(BN_ULONG h, BN_ULONG l, BN_ULONG d)
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{ BN_ULONG ret,waste;
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asm ("divq %4"
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: "=a"(ret),"=d"(waste)
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: "a"(l),"d"(h),"g"(d)
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: "cc");
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return ret;
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}
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BN_ULONG bn_add_words (BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,int n)
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{ BN_ULONG ret;
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size_t i=0;
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if (n <= 0) return 0;
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asm volatile (
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" subq %0,%0 \n" /* clear carry */
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" jmp 1f \n"
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".p2align 4 \n"
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"1: movq (%4,%2,8),%0 \n"
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" adcq (%5,%2,8),%0 \n"
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" movq %0,(%3,%2,8) \n"
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" lea 1(%2),%2 \n"
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" loop 1b \n"
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" sbbq %0,%0 \n"
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: "=&r"(ret),"+c"(n),"+r"(i)
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: "r"(rp),"r"(ap),"r"(bp)
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: "cc", "memory"
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);
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return ret&1;
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}
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#ifndef SIMICS
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BN_ULONG bn_sub_words (BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,int n)
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{ BN_ULONG ret;
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size_t i=0;
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if (n <= 0) return 0;
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asm volatile (
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" subq %0,%0 \n" /* clear borrow */
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" jmp 1f \n"
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".p2align 4 \n"
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"1: movq (%4,%2,8),%0 \n"
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" sbbq (%5,%2,8),%0 \n"
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" movq %0,(%3,%2,8) \n"
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" lea 1(%2),%2 \n"
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" loop 1b \n"
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" sbbq %0,%0 \n"
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: "=&r"(ret),"+c"(n),"+r"(i)
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: "r"(rp),"r"(ap),"r"(bp)
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: "cc", "memory"
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);
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return ret&1;
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}
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#else
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/* Simics 1.4<7 has buggy sbbq:-( */
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#define BN_MASK2 0xffffffffffffffffL
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BN_ULONG bn_sub_words(BN_ULONG *r, BN_ULONG *a, BN_ULONG *b, int n)
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{
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BN_ULONG t1,t2;
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int c=0;
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if (n <= 0) return((BN_ULONG)0);
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for (;;)
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{
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t1=a[0]; t2=b[0];
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r[0]=(t1-t2-c)&BN_MASK2;
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if (t1 != t2) c=(t1 < t2);
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if (--n <= 0) break;
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t1=a[1]; t2=b[1];
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r[1]=(t1-t2-c)&BN_MASK2;
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if (t1 != t2) c=(t1 < t2);
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if (--n <= 0) break;
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t1=a[2]; t2=b[2];
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r[2]=(t1-t2-c)&BN_MASK2;
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if (t1 != t2) c=(t1 < t2);
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if (--n <= 0) break;
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t1=a[3]; t2=b[3];
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r[3]=(t1-t2-c)&BN_MASK2;
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if (t1 != t2) c=(t1 < t2);
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if (--n <= 0) break;
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a+=4;
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b+=4;
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r+=4;
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}
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return(c);
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}
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#endif
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/* mul_add_c(a,b,c0,c1,c2) -- c+=a*b for three word number c=(c2,c1,c0) */
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/* mul_add_c2(a,b,c0,c1,c2) -- c+=2*a*b for three word number c=(c2,c1,c0) */
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/* sqr_add_c(a,i,c0,c1,c2) -- c+=a[i]^2 for three word number c=(c2,c1,c0) */
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/* sqr_add_c2(a,i,c0,c1,c2) -- c+=2*a[i]*a[j] for three word number c=(c2,c1,c0) */
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#if 0
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/* original macros are kept for reference purposes */
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#define mul_add_c(a,b,c0,c1,c2) { \
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BN_ULONG ta=(a),tb=(b); \
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t1 = ta * tb; \
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t2 = BN_UMULT_HIGH(ta,tb); \
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c0 += t1; t2 += (c0<t1)?1:0; \
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c1 += t2; c2 += (c1<t2)?1:0; \
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}
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#define mul_add_c2(a,b,c0,c1,c2) { \
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BN_ULONG ta=(a),tb=(b),t0; \
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t1 = BN_UMULT_HIGH(ta,tb); \
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t0 = ta * tb; \
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t2 = t1+t1; c2 += (t2<t1)?1:0; \
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t1 = t0+t0; t2 += (t1<t0)?1:0; \
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c0 += t1; t2 += (c0<t1)?1:0; \
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c1 += t2; c2 += (c1<t2)?1:0; \
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}
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#else
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#define mul_add_c(a,b,c0,c1,c2) do { \
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asm ("mulq %3" \
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: "=a"(t1),"=d"(t2) \
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: "a"(a),"m"(b) \
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: "cc"); \
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asm ("addq %2,%0; adcq %3,%1" \
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: "+r"(c0),"+d"(t2) \
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: "a"(t1),"g"(0) \
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: "cc"); \
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asm ("addq %2,%0; adcq %3,%1" \
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: "+r"(c1),"+r"(c2) \
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: "d"(t2),"g"(0) \
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: "cc"); \
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} while (0)
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#define sqr_add_c(a,i,c0,c1,c2) do { \
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asm ("mulq %2" \
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: "=a"(t1),"=d"(t2) \
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: "a"(a[i]) \
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: "cc"); \
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asm ("addq %2,%0; adcq %3,%1" \
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: "+r"(c0),"+d"(t2) \
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: "a"(t1),"g"(0) \
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: "cc"); \
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asm ("addq %2,%0; adcq %3,%1" \
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: "+r"(c1),"+r"(c2) \
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: "d"(t2),"g"(0) \
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: "cc"); \
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} while (0)
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#define mul_add_c2(a,b,c0,c1,c2) do { \
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asm ("mulq %3" \
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: "=a"(t1),"=d"(t2) \
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: "a"(a),"m"(b) \
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: "cc"); \
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asm ("addq %0,%0; adcq %2,%1" \
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: "+d"(t2),"+r"(c2) \
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: "g"(0) \
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: "cc"); \
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asm ("addq %0,%0; adcq %2,%1" \
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: "+a"(t1),"+d"(t2) \
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: "g"(0) \
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: "cc"); \
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asm ("addq %2,%0; adcq %3,%1" \
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: "+r"(c0),"+d"(t2) \
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: "a"(t1),"g"(0) \
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: "cc"); \
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asm ("addq %2,%0; adcq %3,%1" \
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: "+r"(c1),"+r"(c2) \
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: "d"(t2),"g"(0) \
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: "cc"); \
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} while (0)
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#endif
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#define sqr_add_c2(a,i,j,c0,c1,c2) \
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mul_add_c2((a)[i],(a)[j],c0,c1,c2)
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void bn_mul_comba8(BN_ULONG *r, BN_ULONG *a, BN_ULONG *b)
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{
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BN_ULONG t1,t2;
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BN_ULONG c1,c2,c3;
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c1=0;
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c2=0;
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c3=0;
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mul_add_c(a[0],b[0],c1,c2,c3);
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r[0]=c1;
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c1=0;
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mul_add_c(a[0],b[1],c2,c3,c1);
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mul_add_c(a[1],b[0],c2,c3,c1);
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r[1]=c2;
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c2=0;
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mul_add_c(a[2],b[0],c3,c1,c2);
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mul_add_c(a[1],b[1],c3,c1,c2);
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mul_add_c(a[0],b[2],c3,c1,c2);
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r[2]=c3;
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c3=0;
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mul_add_c(a[0],b[3],c1,c2,c3);
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mul_add_c(a[1],b[2],c1,c2,c3);
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mul_add_c(a[2],b[1],c1,c2,c3);
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mul_add_c(a[3],b[0],c1,c2,c3);
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r[3]=c1;
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c1=0;
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mul_add_c(a[4],b[0],c2,c3,c1);
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mul_add_c(a[3],b[1],c2,c3,c1);
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mul_add_c(a[2],b[2],c2,c3,c1);
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mul_add_c(a[1],b[3],c2,c3,c1);
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mul_add_c(a[0],b[4],c2,c3,c1);
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r[4]=c2;
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c2=0;
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mul_add_c(a[0],b[5],c3,c1,c2);
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mul_add_c(a[1],b[4],c3,c1,c2);
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mul_add_c(a[2],b[3],c3,c1,c2);
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mul_add_c(a[3],b[2],c3,c1,c2);
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mul_add_c(a[4],b[1],c3,c1,c2);
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mul_add_c(a[5],b[0],c3,c1,c2);
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r[5]=c3;
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c3=0;
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mul_add_c(a[6],b[0],c1,c2,c3);
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mul_add_c(a[5],b[1],c1,c2,c3);
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mul_add_c(a[4],b[2],c1,c2,c3);
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mul_add_c(a[3],b[3],c1,c2,c3);
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mul_add_c(a[2],b[4],c1,c2,c3);
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mul_add_c(a[1],b[5],c1,c2,c3);
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mul_add_c(a[0],b[6],c1,c2,c3);
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r[6]=c1;
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c1=0;
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mul_add_c(a[0],b[7],c2,c3,c1);
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mul_add_c(a[1],b[6],c2,c3,c1);
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mul_add_c(a[2],b[5],c2,c3,c1);
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mul_add_c(a[3],b[4],c2,c3,c1);
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mul_add_c(a[4],b[3],c2,c3,c1);
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mul_add_c(a[5],b[2],c2,c3,c1);
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mul_add_c(a[6],b[1],c2,c3,c1);
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mul_add_c(a[7],b[0],c2,c3,c1);
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r[7]=c2;
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c2=0;
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mul_add_c(a[7],b[1],c3,c1,c2);
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mul_add_c(a[6],b[2],c3,c1,c2);
|
||
mul_add_c(a[5],b[3],c3,c1,c2);
|
||
mul_add_c(a[4],b[4],c3,c1,c2);
|
||
mul_add_c(a[3],b[5],c3,c1,c2);
|
||
mul_add_c(a[2],b[6],c3,c1,c2);
|
||
mul_add_c(a[1],b[7],c3,c1,c2);
|
||
r[8]=c3;
|
||
c3=0;
|
||
mul_add_c(a[2],b[7],c1,c2,c3);
|
||
mul_add_c(a[3],b[6],c1,c2,c3);
|
||
mul_add_c(a[4],b[5],c1,c2,c3);
|
||
mul_add_c(a[5],b[4],c1,c2,c3);
|
||
mul_add_c(a[6],b[3],c1,c2,c3);
|
||
mul_add_c(a[7],b[2],c1,c2,c3);
|
||
r[9]=c1;
|
||
c1=0;
|
||
mul_add_c(a[7],b[3],c2,c3,c1);
|
||
mul_add_c(a[6],b[4],c2,c3,c1);
|
||
mul_add_c(a[5],b[5],c2,c3,c1);
|
||
mul_add_c(a[4],b[6],c2,c3,c1);
|
||
mul_add_c(a[3],b[7],c2,c3,c1);
|
||
r[10]=c2;
|
||
c2=0;
|
||
mul_add_c(a[4],b[7],c3,c1,c2);
|
||
mul_add_c(a[5],b[6],c3,c1,c2);
|
||
mul_add_c(a[6],b[5],c3,c1,c2);
|
||
mul_add_c(a[7],b[4],c3,c1,c2);
|
||
r[11]=c3;
|
||
c3=0;
|
||
mul_add_c(a[7],b[5],c1,c2,c3);
|
||
mul_add_c(a[6],b[6],c1,c2,c3);
|
||
mul_add_c(a[5],b[7],c1,c2,c3);
|
||
r[12]=c1;
|
||
c1=0;
|
||
mul_add_c(a[6],b[7],c2,c3,c1);
|
||
mul_add_c(a[7],b[6],c2,c3,c1);
|
||
r[13]=c2;
|
||
c2=0;
|
||
mul_add_c(a[7],b[7],c3,c1,c2);
|
||
r[14]=c3;
|
||
r[15]=c1;
|
||
}
|
||
|
||
void bn_mul_comba4(BN_ULONG *r, BN_ULONG *a, BN_ULONG *b)
|
||
{
|
||
BN_ULONG t1,t2;
|
||
BN_ULONG c1,c2,c3;
|
||
|
||
c1=0;
|
||
c2=0;
|
||
c3=0;
|
||
mul_add_c(a[0],b[0],c1,c2,c3);
|
||
r[0]=c1;
|
||
c1=0;
|
||
mul_add_c(a[0],b[1],c2,c3,c1);
|
||
mul_add_c(a[1],b[0],c2,c3,c1);
|
||
r[1]=c2;
|
||
c2=0;
|
||
mul_add_c(a[2],b[0],c3,c1,c2);
|
||
mul_add_c(a[1],b[1],c3,c1,c2);
|
||
mul_add_c(a[0],b[2],c3,c1,c2);
|
||
r[2]=c3;
|
||
c3=0;
|
||
mul_add_c(a[0],b[3],c1,c2,c3);
|
||
mul_add_c(a[1],b[2],c1,c2,c3);
|
||
mul_add_c(a[2],b[1],c1,c2,c3);
|
||
mul_add_c(a[3],b[0],c1,c2,c3);
|
||
r[3]=c1;
|
||
c1=0;
|
||
mul_add_c(a[3],b[1],c2,c3,c1);
|
||
mul_add_c(a[2],b[2],c2,c3,c1);
|
||
mul_add_c(a[1],b[3],c2,c3,c1);
|
||
r[4]=c2;
|
||
c2=0;
|
||
mul_add_c(a[2],b[3],c3,c1,c2);
|
||
mul_add_c(a[3],b[2],c3,c1,c2);
|
||
r[5]=c3;
|
||
c3=0;
|
||
mul_add_c(a[3],b[3],c1,c2,c3);
|
||
r[6]=c1;
|
||
r[7]=c2;
|
||
}
|
||
|
||
void bn_sqr_comba8(BN_ULONG *r, const BN_ULONG *a)
|
||
{
|
||
BN_ULONG t1,t2;
|
||
BN_ULONG c1,c2,c3;
|
||
|
||
c1=0;
|
||
c2=0;
|
||
c3=0;
|
||
sqr_add_c(a,0,c1,c2,c3);
|
||
r[0]=c1;
|
||
c1=0;
|
||
sqr_add_c2(a,1,0,c2,c3,c1);
|
||
r[1]=c2;
|
||
c2=0;
|
||
sqr_add_c(a,1,c3,c1,c2);
|
||
sqr_add_c2(a,2,0,c3,c1,c2);
|
||
r[2]=c3;
|
||
c3=0;
|
||
sqr_add_c2(a,3,0,c1,c2,c3);
|
||
sqr_add_c2(a,2,1,c1,c2,c3);
|
||
r[3]=c1;
|
||
c1=0;
|
||
sqr_add_c(a,2,c2,c3,c1);
|
||
sqr_add_c2(a,3,1,c2,c3,c1);
|
||
sqr_add_c2(a,4,0,c2,c3,c1);
|
||
r[4]=c2;
|
||
c2=0;
|
||
sqr_add_c2(a,5,0,c3,c1,c2);
|
||
sqr_add_c2(a,4,1,c3,c1,c2);
|
||
sqr_add_c2(a,3,2,c3,c1,c2);
|
||
r[5]=c3;
|
||
c3=0;
|
||
sqr_add_c(a,3,c1,c2,c3);
|
||
sqr_add_c2(a,4,2,c1,c2,c3);
|
||
sqr_add_c2(a,5,1,c1,c2,c3);
|
||
sqr_add_c2(a,6,0,c1,c2,c3);
|
||
r[6]=c1;
|
||
c1=0;
|
||
sqr_add_c2(a,7,0,c2,c3,c1);
|
||
sqr_add_c2(a,6,1,c2,c3,c1);
|
||
sqr_add_c2(a,5,2,c2,c3,c1);
|
||
sqr_add_c2(a,4,3,c2,c3,c1);
|
||
r[7]=c2;
|
||
c2=0;
|
||
sqr_add_c(a,4,c3,c1,c2);
|
||
sqr_add_c2(a,5,3,c3,c1,c2);
|
||
sqr_add_c2(a,6,2,c3,c1,c2);
|
||
sqr_add_c2(a,7,1,c3,c1,c2);
|
||
r[8]=c3;
|
||
c3=0;
|
||
sqr_add_c2(a,7,2,c1,c2,c3);
|
||
sqr_add_c2(a,6,3,c1,c2,c3);
|
||
sqr_add_c2(a,5,4,c1,c2,c3);
|
||
r[9]=c1;
|
||
c1=0;
|
||
sqr_add_c(a,5,c2,c3,c1);
|
||
sqr_add_c2(a,6,4,c2,c3,c1);
|
||
sqr_add_c2(a,7,3,c2,c3,c1);
|
||
r[10]=c2;
|
||
c2=0;
|
||
sqr_add_c2(a,7,4,c3,c1,c2);
|
||
sqr_add_c2(a,6,5,c3,c1,c2);
|
||
r[11]=c3;
|
||
c3=0;
|
||
sqr_add_c(a,6,c1,c2,c3);
|
||
sqr_add_c2(a,7,5,c1,c2,c3);
|
||
r[12]=c1;
|
||
c1=0;
|
||
sqr_add_c2(a,7,6,c2,c3,c1);
|
||
r[13]=c2;
|
||
c2=0;
|
||
sqr_add_c(a,7,c3,c1,c2);
|
||
r[14]=c3;
|
||
r[15]=c1;
|
||
}
|
||
|
||
void bn_sqr_comba4(BN_ULONG *r, const BN_ULONG *a)
|
||
{
|
||
BN_ULONG t1,t2;
|
||
BN_ULONG c1,c2,c3;
|
||
|
||
c1=0;
|
||
c2=0;
|
||
c3=0;
|
||
sqr_add_c(a,0,c1,c2,c3);
|
||
r[0]=c1;
|
||
c1=0;
|
||
sqr_add_c2(a,1,0,c2,c3,c1);
|
||
r[1]=c2;
|
||
c2=0;
|
||
sqr_add_c(a,1,c3,c1,c2);
|
||
sqr_add_c2(a,2,0,c3,c1,c2);
|
||
r[2]=c3;
|
||
c3=0;
|
||
sqr_add_c2(a,3,0,c1,c2,c3);
|
||
sqr_add_c2(a,2,1,c1,c2,c3);
|
||
r[3]=c1;
|
||
c1=0;
|
||
sqr_add_c(a,2,c2,c3,c1);
|
||
sqr_add_c2(a,3,1,c2,c3,c1);
|
||
r[4]=c2;
|
||
c2=0;
|
||
sqr_add_c2(a,3,2,c3,c1,c2);
|
||
r[5]=c3;
|
||
c3=0;
|
||
sqr_add_c(a,3,c1,c2,c3);
|
||
r[6]=c1;
|
||
r[7]=c2;
|
||
}
|
||
#endif
|