1030 lines
23 KiB
ArmAsm
1030 lines
23 KiB
ArmAsm
/* Copyright (c) 2005 Hewlett-Packard Development Company, L.P.
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Permission is hereby granted, free of charge, to any person obtaining
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a copy of this software and associated documentation files (the
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"Software"), to deal in the Software without restriction, including
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without limitation the rights to use, copy, modify, merge, publish,
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distribute, sublicense, and/or sell copies of the Software, and to
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permit persons to whom the Software is furnished to do so, subject to
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the following conditions:
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The above copyright notice and this permission notice shall be
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included in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
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LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
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// Common registers are assigned as follows:
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//
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// COMMON
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//
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// t0 Const Tbl Ptr TPtr
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// t1 Round Constant TRound
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// t4 Block residual LenResid
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// t5 Residual Data DTmp
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//
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// {in,out}0 Block 0 Cycle RotateM0
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// {in,out}1 Block Value 12 M12
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// {in,out}2 Block Value 8 M8
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// {in,out}3 Block Value 4 M4
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// {in,out}4 Block Value 0 M0
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// {in,out}5 Block 1 Cycle RotateM1
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// {in,out}6 Block Value 13 M13
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// {in,out}7 Block Value 9 M9
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// {in,out}8 Block Value 5 M5
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// {in,out}9 Block Value 1 M1
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// {in,out}10 Block 2 Cycle RotateM2
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// {in,out}11 Block Value 14 M14
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// {in,out}12 Block Value 10 M10
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// {in,out}13 Block Value 6 M6
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// {in,out}14 Block Value 2 M2
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// {in,out}15 Block 3 Cycle RotateM3
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// {in,out}16 Block Value 15 M15
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// {in,out}17 Block Value 11 M11
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// {in,out}18 Block Value 7 M7
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// {in,out}19 Block Value 3 M3
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// {in,out}20 Scratch Z
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// {in,out}21 Scratch Y
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// {in,out}22 Scratch X
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// {in,out}23 Scratch W
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// {in,out}24 Digest A A
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// {in,out}25 Digest B B
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// {in,out}26 Digest C C
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// {in,out}27 Digest D D
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// {in,out}28 Active Data Ptr DPtr
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// in28 Dummy Value -
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// out28 Dummy Value -
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// bt0 Coroutine Link QUICK_RTN
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//
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/// These predicates are used for computing the padding block(s) and
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/// are shared between the driver and digest co-routines
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//
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// pt0 Extra Pad Block pExtra
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// pt1 Load next word pLoad
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// pt2 Skip next word pSkip
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// pt3 Search for Pad pNoPad
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// pt4 Pad Word 0 pPad0
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// pt5 Pad Word 1 pPad1
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// pt6 Pad Word 2 pPad2
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// pt7 Pad Word 3 pPad3
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#define DTmp r19
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#define LenResid r18
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#define QUICK_RTN b6
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#define TPtr r14
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#define TRound r15
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#define pExtra p6
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#define pLoad p7
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#define pNoPad p9
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#define pPad0 p10
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#define pPad1 p11
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#define pPad2 p12
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#define pPad3 p13
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#define pSkip p8
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// This two below shall remain constant througout whole routine
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#define pDataOrder p14
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#define pHostOrder p15
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#define A_ out24
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#define B_ out25
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#define C_ out26
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#define D_ out27
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#define DPtr_ out28
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#define M0_ out4
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#define M1_ out9
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#define M10_ out12
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#define M11_ out17
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#define M12_ out1
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#define M13_ out6
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#define M14_ out11
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#define M15_ out16
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#define M2_ out14
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#define M3_ out19
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#define M4_ out3
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#define M5_ out8
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#define M6_ out13
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#define M7_ out18
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#define M8_ out2
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#define M9_ out7
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#define RotateM0_ out0
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#define RotateM1_ out5
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#define RotateM2_ out10
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#define RotateM3_ out15
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#define W_ out23
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#define X_ out22
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#define Y_ out21
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#define Z_ out20
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#define A in24
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#define B in25
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#define C in26
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#define D in27
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#define DPtr in28
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#define M0 in4
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#define M1 in9
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#define M10 in12
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#define M11 in17
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#define M12 in1
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#define M13 in6
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#define M14 in11
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#define M15 in16
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#define M2 in14
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#define M3 in19
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#define M4 in3
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#define M5 in8
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#define M6 in13
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#define M7 in18
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#define M8 in2
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#define M9 in7
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#define RotateM0 in0
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#define RotateM1 in5
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#define RotateM2 in10
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#define RotateM3 in15
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#define W in23
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#define X in22
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#define Y in21
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#define Z in20
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/* register stack configuration for md5_block_asm_host_order(): */
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#define MD5_NINP 3
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#define MD5_NLOC 0
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#define MD5_NOUT 29
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#define MD5_NROT 0
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/* register stack configuration for helpers: */
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#define _NINPUTS MD5_NOUT
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#define _NLOCALS 0
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#define _NOUTPUT 0
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#define _NROTATE 24 /* this must be <= _NINPUTS */
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#if defined(_HPUX_SOURCE) && !defined(_LP64)
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#define ADDP addp4
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#else
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#define ADDP add
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#endif
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#if defined(_HPUX_SOURCE) || defined(B_ENDIAN)
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#define HOST_IS_BIG_ENDIAN
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#endif
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// Macros for getting the left and right portions of little-endian words
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#define GETLW(dst, src, align) dep.z dst = src, 32 - 8 * align, 8 * align
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#define GETRW(dst, src, align) extr.u dst = src, 8 * align, 32 - 8 * align
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// MD5 driver
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//
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// Reads an input block, then calls the digest block
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// subroutine and adds the results to the accumulated
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// digest. It allocates 32 outs which the subroutine
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// uses as it's inputs and rotating
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// registers. Initializes the round constant pointer and
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// takes care of saving/restoring ar.lc
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//
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/// INPUT
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//
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// in0 Context Ptr CtxPtr0
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// in1 Input Data Ptr DPtrIn
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// in2 Integral Blocks BlockCount
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// rp Return Address -
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//
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/// CODE
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//
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// v2 Input Align InAlign
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// t0 Shared w/digest -
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// t1 Shared w/digest -
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// t2 Shared w/digest -
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// t3 Shared w/digest -
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// t4 Shared w/digest -
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// t5 Shared w/digest -
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// t6 PFS Save PFSSave
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// t7 ar.lc Save LCSave
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// t8 Saved PR PRSave
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// t9 2nd CtxPtr CtxPtr1
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// t10 Table Base CTable
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// t11 Table[0] CTable0
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// t13 Accumulator A AccumA
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// t14 Accumulator B AccumB
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// t15 Accumulator C AccumC
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// t16 Accumulator D AccumD
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// pt0 Shared w/digest -
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// pt1 Shared w/digest -
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// pt2 Shared w/digest -
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// pt3 Shared w/digest -
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// pt4 Shared w/digest -
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// pt5 Shared w/digest -
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// pt6 Shared w/digest -
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// pt7 Shared w/digest -
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// pt8 Not Aligned pOff
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// pt8 Blocks Left pAgain
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#define AccumA r27
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#define AccumB r28
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#define AccumC r29
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#define AccumD r30
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#define CTable r24
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#define CTable0 r25
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#define CtxPtr0 in0
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#define CtxPtr1 r23
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#define DPtrIn in1
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#define BlockCount in2
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#define InAlign r10
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#define LCSave r21
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#define PFSSave r20
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#define PRSave r22
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#define pAgain p63
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#define pOff p63
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.text
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/* md5_block_asm_host_order(MD5_CTX *c, const void *data, size_t num)
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where:
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c: a pointer to a structure of this type:
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typedef struct MD5state_st
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{
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MD5_LONG A,B,C,D;
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MD5_LONG Nl,Nh;
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MD5_LONG data[MD5_LBLOCK];
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unsigned int num;
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}
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MD5_CTX;
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data: a pointer to the input data (may be misaligned)
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num: the number of 16-byte blocks to hash (i.e., the length
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of DATA is 16*NUM.
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*/
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.type md5_block_asm_data_order, @function
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.global md5_block_asm_data_order
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.align 32
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.proc md5_block_asm_data_order
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md5_block_asm_data_order:
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{ .mib
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cmp.eq pDataOrder,pHostOrder = r0,r0
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br.sptk.many .md5_block
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};;
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.endp md5_block_asm_data_order
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.type md5_block_asm_host_order, @function
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.global md5_block_asm_host_order
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.proc md5_block_asm_host_order
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md5_block_asm_host_order:
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.prologue
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{ .mib
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cmp.eq pHostOrder,pDataOrder = r0,r0
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};;
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.md5_block:
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{ .mmi
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.save ar.pfs, PFSSave
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alloc PFSSave = ar.pfs, MD5_NINP, MD5_NLOC, MD5_NOUT, MD5_NROT
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ADDP CtxPtr1 = 8, CtxPtr0
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mov CTable = ip
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}
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{ .mmi
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ADDP DPtrIn = 0, DPtrIn
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ADDP CtxPtr0 = 0, CtxPtr0
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.save ar.lc, LCSave
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mov LCSave = ar.lc
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}
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;;
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.pred.rel "mutex",pDataOrder,pHostOrder
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{ .mmi
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(pDataOrder) add CTable = .md5_tbl_data_order#-.md5_block#, CTable
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(pHostOrder) add CTable = .md5_tbl_host_order#-.md5_block#, CTable
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and InAlign = 0x3, DPtrIn
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}
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{ .mmi
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ld4 AccumA = [CtxPtr0], 4
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ld4 AccumC = [CtxPtr1], 4
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.save pr, PRSave
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mov PRSave = pr
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.body
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}
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;;
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{ .mmi
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ld4 AccumB = [CtxPtr0]
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ld4 AccumD = [CtxPtr1]
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dep DPtr_ = 0, DPtrIn, 0, 2
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} ;;
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#ifdef HOST_IS_BIG_ENDIAN
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(pDataOrder) rum psr.be;; // switch to little-endian
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#endif
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{ .mmb
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ld4 CTable0 = [CTable], 4
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cmp.ne pOff, p0 = 0, InAlign
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(pOff) br.cond.spnt.many .md5_unaligned
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} ;;
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// The FF load/compute loop rotates values three times, so that
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// loading into M12 here produces the M0 value, M13 -> M1, etc.
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.md5_block_loop0:
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{ .mmi
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ld4 M12_ = [DPtr_], 4
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mov TPtr = CTable
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mov TRound = CTable0
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} ;;
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{ .mmi
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ld4 M13_ = [DPtr_], 4
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mov A_ = AccumA
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mov B_ = AccumB
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} ;;
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{ .mmi
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ld4 M14_ = [DPtr_], 4
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mov C_ = AccumC
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mov D_ = AccumD
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} ;;
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{ .mmb
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ld4 M15_ = [DPtr_], 4
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add BlockCount = -1, BlockCount
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br.call.sptk.many QUICK_RTN = md5_digest_block0
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} ;;
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// Now, we add the new digest values and do some clean-up
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// before checking if there's another full block to process
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{ .mmi
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add AccumA = AccumA, A_
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add AccumB = AccumB, B_
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cmp.ne pAgain, p0 = 0, BlockCount
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}
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{ .mib
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add AccumC = AccumC, C_
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add AccumD = AccumD, D_
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(pAgain) br.cond.dptk.many .md5_block_loop0
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} ;;
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.md5_exit:
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#ifdef HOST_IS_BIG_ENDIAN
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(pDataOrder) sum psr.be;; // switch back to big-endian mode
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#endif
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{ .mmi
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st4 [CtxPtr0] = AccumB, -4
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st4 [CtxPtr1] = AccumD, -4
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mov pr = PRSave, 0x1ffff ;;
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}
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{ .mmi
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st4 [CtxPtr0] = AccumA
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st4 [CtxPtr1] = AccumC
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mov ar.lc = LCSave
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} ;;
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{ .mib
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mov ar.pfs = PFSSave
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br.ret.sptk.few rp
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} ;;
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#define MD5UNALIGNED(offset) \
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.md5_process##offset: \
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{ .mib ; \
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nop 0x0 ; \
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GETRW(DTmp, DTmp, offset) ; \
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} ;; \
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.md5_block_loop##offset: \
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{ .mmi ; \
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ld4 Y_ = [DPtr_], 4 ; \
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mov TPtr = CTable ; \
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mov TRound = CTable0 ; \
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} ;; \
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{ .mmi ; \
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ld4 M13_ = [DPtr_], 4 ; \
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mov A_ = AccumA ; \
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mov B_ = AccumB ; \
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} ;; \
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{ .mii ; \
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ld4 M14_ = [DPtr_], 4 ; \
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GETLW(W_, Y_, offset) ; \
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mov C_ = AccumC ; \
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} \
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{ .mmi ; \
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mov D_ = AccumD ;; \
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or M12_ = W_, DTmp ; \
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GETRW(DTmp, Y_, offset) ; \
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} \
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{ .mib ; \
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ld4 M15_ = [DPtr_], 4 ; \
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add BlockCount = -1, BlockCount ; \
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br.call.sptk.many QUICK_RTN = md5_digest_block##offset; \
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} ;; \
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{ .mmi ; \
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add AccumA = AccumA, A_ ; \
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add AccumB = AccumB, B_ ; \
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cmp.ne pAgain, p0 = 0, BlockCount ; \
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} \
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{ .mib ; \
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add AccumC = AccumC, C_ ; \
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add AccumD = AccumD, D_ ; \
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(pAgain) br.cond.dptk.many .md5_block_loop##offset ; \
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} ;; \
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{ .mib ; \
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nop 0x0 ; \
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nop 0x0 ; \
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br.cond.sptk.many .md5_exit ; \
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} ;;
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.align 32
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.md5_unaligned:
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//
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// Because variable shifts are expensive, we special case each of
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// the four alignements. In practice, this won't hurt too much
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// since only one working set of code will be loaded.
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//
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{ .mib
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ld4 DTmp = [DPtr_], 4
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cmp.eq pOff, p0 = 1, InAlign
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(pOff) br.cond.dpnt.many .md5_process1
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} ;;
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{ .mib
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cmp.eq pOff, p0 = 2, InAlign
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nop 0x0
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(pOff) br.cond.dpnt.many .md5_process2
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} ;;
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MD5UNALIGNED(3)
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MD5UNALIGNED(1)
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MD5UNALIGNED(2)
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.endp md5_block_asm_host_order
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// MD5 Perform the F function and load
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//
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// Passed the first 4 words (M0 - M3) and initial (A, B, C, D) values,
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// computes the FF() round of functions, then branches to the common
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// digest code to finish up with GG(), HH, and II().
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//
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// INPUT
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//
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// rp Return Address -
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//
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// CODE
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//
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// v0 PFS bit bucket PFS
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// v1 Loop Trip Count LTrip
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// pt0 Load next word pMore
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/* For F round: */
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#define LTrip r9
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#define PFS r8
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#define pMore p6
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/* For GHI rounds: */
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#define T r9
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#define U r10
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#define V r11
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#define COMPUTE(a, b, s, M, R) \
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{ \
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.mii ; \
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ld4 TRound = [TPtr], 4 ; \
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dep.z Y = Z, 32, 32 ;; \
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shrp Z = Z, Y, 64 - s ; \
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} ;; \
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{ \
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.mmi ; \
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add a = Z, b ; \
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mov R = M ; \
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nop 0x0 ; \
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} ;;
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#define LOOP(a, b, s, M, R, label) \
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{ .mii ; \
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ld4 TRound = [TPtr], 4 ; \
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dep.z Y = Z, 32, 32 ;; \
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shrp Z = Z, Y, 64 - s ; \
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} ;; \
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{ .mib ; \
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add a = Z, b ; \
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mov R = M ; \
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br.ctop.sptk.many label ; \
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} ;;
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// G(B, C, D) = (B & D) | (C & ~D)
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#define G(a, b, c, d, M) \
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{ .mmi ; \
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add Z = M, TRound ; \
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and Y = b, d ; \
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andcm X = c, d ; \
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} ;; \
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{ .mii ; \
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add Z = Z, a ; \
|
|
or Y = Y, X ;; \
|
|
add Z = Z, Y ; \
|
|
} ;;
|
|
|
|
// H(B, C, D) = B ^ C ^ D
|
|
|
|
#define H(a, b, c, d, M) \
|
|
{ .mmi ; \
|
|
add Z = M, TRound ; \
|
|
xor Y = b, c ; \
|
|
nop 0x0 ; \
|
|
} ;; \
|
|
{ .mii ; \
|
|
add Z = Z, a ; \
|
|
xor Y = Y, d ;; \
|
|
add Z = Z, Y ; \
|
|
} ;;
|
|
|
|
// I(B, C, D) = C ^ (B | ~D)
|
|
//
|
|
// However, since we have an andcm operator, we use the fact that
|
|
//
|
|
// Y ^ Z == ~Y ^ ~Z
|
|
//
|
|
// to rewrite the expression as
|
|
//
|
|
// I(B, C, D) = ~C ^ (~B & D)
|
|
|
|
#define I(a, b, c, d, M) \
|
|
{ .mmi ; \
|
|
add Z = M, TRound ; \
|
|
andcm Y = d, b ; \
|
|
andcm X = -1, c ; \
|
|
} ;; \
|
|
{ .mii ; \
|
|
add Z = Z, a ; \
|
|
xor Y = Y, X ;; \
|
|
add Z = Z, Y ; \
|
|
} ;;
|
|
|
|
#define GG4(label) \
|
|
G(A, B, C, D, M0) \
|
|
COMPUTE(A, B, 5, M0, RotateM0) \
|
|
G(D, A, B, C, M1) \
|
|
COMPUTE(D, A, 9, M1, RotateM1) \
|
|
G(C, D, A, B, M2) \
|
|
COMPUTE(C, D, 14, M2, RotateM2) \
|
|
G(B, C, D, A, M3) \
|
|
LOOP(B, C, 20, M3, RotateM3, label)
|
|
|
|
#define HH4(label) \
|
|
H(A, B, C, D, M0) \
|
|
COMPUTE(A, B, 4, M0, RotateM0) \
|
|
H(D, A, B, C, M1) \
|
|
COMPUTE(D, A, 11, M1, RotateM1) \
|
|
H(C, D, A, B, M2) \
|
|
COMPUTE(C, D, 16, M2, RotateM2) \
|
|
H(B, C, D, A, M3) \
|
|
LOOP(B, C, 23, M3, RotateM3, label)
|
|
|
|
#define II4(label) \
|
|
I(A, B, C, D, M0) \
|
|
COMPUTE(A, B, 6, M0, RotateM0) \
|
|
I(D, A, B, C, M1) \
|
|
COMPUTE(D, A, 10, M1, RotateM1) \
|
|
I(C, D, A, B, M2) \
|
|
COMPUTE(C, D, 15, M2, RotateM2) \
|
|
I(B, C, D, A, M3) \
|
|
LOOP(B, C, 21, M3, RotateM3, label)
|
|
|
|
#define FFLOAD(a, b, c, d, M, N, s) \
|
|
{ .mii ; \
|
|
(pMore) ld4 N = [DPtr], 4 ; \
|
|
add Z = M, TRound ; \
|
|
and Y = c, b ; \
|
|
} \
|
|
{ .mmi ; \
|
|
andcm X = d, b ;; \
|
|
add Z = Z, a ; \
|
|
or Y = Y, X ; \
|
|
} ;; \
|
|
{ .mii ; \
|
|
ld4 TRound = [TPtr], 4 ; \
|
|
add Z = Z, Y ;; \
|
|
dep.z Y = Z, 32, 32 ; \
|
|
} ;; \
|
|
{ .mii ; \
|
|
nop 0x0 ; \
|
|
shrp Z = Z, Y, 64 - s ;; \
|
|
add a = Z, b ; \
|
|
} ;;
|
|
|
|
#define FFLOOP(a, b, c, d, M, N, s, dest) \
|
|
{ .mii ; \
|
|
(pMore) ld4 N = [DPtr], 4 ; \
|
|
add Z = M, TRound ; \
|
|
and Y = c, b ; \
|
|
} \
|
|
{ .mmi ; \
|
|
andcm X = d, b ;; \
|
|
add Z = Z, a ; \
|
|
or Y = Y, X ; \
|
|
} ;; \
|
|
{ .mii ; \
|
|
ld4 TRound = [TPtr], 4 ; \
|
|
add Z = Z, Y ;; \
|
|
dep.z Y = Z, 32, 32 ; \
|
|
} ;; \
|
|
{ .mii ; \
|
|
nop 0x0 ; \
|
|
shrp Z = Z, Y, 64 - s ;; \
|
|
add a = Z, b ; \
|
|
} \
|
|
{ .mib ; \
|
|
cmp.ne pMore, p0 = 0, LTrip ; \
|
|
add LTrip = -1, LTrip ; \
|
|
br.ctop.dptk.many dest ; \
|
|
} ;;
|
|
|
|
.type md5_digest_block0, @function
|
|
.align 32
|
|
|
|
.proc md5_digest_block0
|
|
.prologue
|
|
md5_digest_block0:
|
|
.altrp QUICK_RTN
|
|
.body
|
|
{ .mmi
|
|
alloc PFS = ar.pfs, _NINPUTS, _NLOCALS, _NOUTPUT, _NROTATE
|
|
mov LTrip = 2
|
|
mov ar.lc = 3
|
|
} ;;
|
|
{ .mii
|
|
cmp.eq pMore, p0 = r0, r0
|
|
mov ar.ec = 0
|
|
nop 0x0
|
|
} ;;
|
|
|
|
.md5_FF_round0:
|
|
FFLOAD(A, B, C, D, M12, RotateM0, 7)
|
|
FFLOAD(D, A, B, C, M13, RotateM1, 12)
|
|
FFLOAD(C, D, A, B, M14, RotateM2, 17)
|
|
FFLOOP(B, C, D, A, M15, RotateM3, 22, .md5_FF_round0)
|
|
//
|
|
// !!! Fall through to md5_digest_GHI
|
|
//
|
|
.endp md5_digest_block0
|
|
|
|
.type md5_digest_GHI, @function
|
|
.align 32
|
|
|
|
.proc md5_digest_GHI
|
|
.prologue
|
|
.regstk _NINPUTS, _NLOCALS, _NOUTPUT, _NROTATE
|
|
md5_digest_GHI:
|
|
.altrp QUICK_RTN
|
|
.body
|
|
//
|
|
// The following sequence shuffles the block counstants round for the
|
|
// next round:
|
|
//
|
|
// 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
|
|
// 1 6 11 0 5 10 14 4 9 14 3 8 13 2 7 12
|
|
//
|
|
{ .mmi
|
|
mov Z = M0
|
|
mov Y = M15
|
|
mov ar.lc = 3
|
|
}
|
|
{ .mmi
|
|
mov X = M2
|
|
mov W = M9
|
|
mov V = M4
|
|
} ;;
|
|
|
|
{ .mmi
|
|
mov M0 = M1
|
|
mov M15 = M12
|
|
mov ar.ec = 1
|
|
}
|
|
{ .mmi
|
|
mov M2 = M11
|
|
mov M9 = M14
|
|
mov M4 = M5
|
|
} ;;
|
|
|
|
{ .mmi
|
|
mov M1 = M6
|
|
mov M12 = M13
|
|
mov U = M3
|
|
}
|
|
{ .mmi
|
|
mov M11 = M8
|
|
mov M14 = M7
|
|
mov M5 = M10
|
|
} ;;
|
|
|
|
{ .mmi
|
|
mov M6 = Y
|
|
mov M13 = X
|
|
mov M3 = Z
|
|
}
|
|
{ .mmi
|
|
mov M8 = W
|
|
mov M7 = V
|
|
mov M10 = U
|
|
} ;;
|
|
|
|
.md5_GG_round:
|
|
GG4(.md5_GG_round)
|
|
|
|
// The following sequence shuffles the block constants round for the
|
|
// next round:
|
|
//
|
|
// 1 6 11 0 5 10 14 4 9 14 3 8 13 2 7 12
|
|
// 5 8 11 14 1 4 7 10 13 0 3 6 9 12 15 2
|
|
|
|
{ .mmi
|
|
mov Z = M0
|
|
mov Y = M1
|
|
mov ar.lc = 3
|
|
}
|
|
{ .mmi
|
|
mov X = M3
|
|
mov W = M5
|
|
mov V = M6
|
|
} ;;
|
|
|
|
{ .mmi
|
|
mov M0 = M4
|
|
mov M1 = M11
|
|
mov ar.ec = 1
|
|
}
|
|
{ .mmi
|
|
mov M3 = M9
|
|
mov U = M8
|
|
mov T = M13
|
|
} ;;
|
|
|
|
{ .mmi
|
|
mov M4 = Z
|
|
mov M11 = Y
|
|
mov M5 = M7
|
|
}
|
|
{ .mmi
|
|
mov M6 = M14
|
|
mov M8 = M12
|
|
mov M13 = M15
|
|
} ;;
|
|
|
|
{ .mmi
|
|
mov M7 = W
|
|
mov M14 = V
|
|
nop 0x0
|
|
}
|
|
{ .mmi
|
|
mov M9 = X
|
|
mov M12 = U
|
|
mov M15 = T
|
|
} ;;
|
|
|
|
.md5_HH_round:
|
|
HH4(.md5_HH_round)
|
|
|
|
// The following sequence shuffles the block constants round for the
|
|
// next round:
|
|
//
|
|
// 5 8 11 14 1 4 7 10 13 0 3 6 9 12 15 2
|
|
// 0 7 14 5 12 3 10 1 8 15 6 13 4 11 2 9
|
|
|
|
{ .mmi
|
|
mov Z = M0
|
|
mov Y = M15
|
|
mov ar.lc = 3
|
|
}
|
|
{ .mmi
|
|
mov X = M10
|
|
mov W = M1
|
|
mov V = M4
|
|
} ;;
|
|
|
|
{ .mmi
|
|
mov M0 = M9
|
|
mov M15 = M12
|
|
mov ar.ec = 1
|
|
}
|
|
{ .mmi
|
|
mov M10 = M11
|
|
mov M1 = M6
|
|
mov M4 = M13
|
|
} ;;
|
|
|
|
{ .mmi
|
|
mov M9 = M14
|
|
mov M12 = M5
|
|
mov U = M3
|
|
}
|
|
{ .mmi
|
|
mov M11 = M8
|
|
mov M6 = M7
|
|
mov M13 = M2
|
|
} ;;
|
|
|
|
{ .mmi
|
|
mov M14 = Y
|
|
mov M5 = X
|
|
mov M3 = Z
|
|
}
|
|
{ .mmi
|
|
mov M8 = W
|
|
mov M7 = V
|
|
mov M2 = U
|
|
} ;;
|
|
|
|
.md5_II_round:
|
|
II4(.md5_II_round)
|
|
|
|
{ .mib
|
|
nop 0x0
|
|
nop 0x0
|
|
br.ret.sptk.many QUICK_RTN
|
|
} ;;
|
|
|
|
.endp md5_digest_GHI
|
|
|
|
#define FFLOADU(a, b, c, d, M, P, N, s, offset) \
|
|
{ .mii ; \
|
|
(pMore) ld4 N = [DPtr], 4 ; \
|
|
add Z = M, TRound ; \
|
|
and Y = c, b ; \
|
|
} \
|
|
{ .mmi ; \
|
|
andcm X = d, b ;; \
|
|
add Z = Z, a ; \
|
|
or Y = Y, X ; \
|
|
} ;; \
|
|
{ .mii ; \
|
|
ld4 TRound = [TPtr], 4 ; \
|
|
GETLW(W, P, offset) ; \
|
|
add Z = Z, Y ; \
|
|
} ;; \
|
|
{ .mii ; \
|
|
or W = W, DTmp ; \
|
|
dep.z Y = Z, 32, 32 ;; \
|
|
shrp Z = Z, Y, 64 - s ; \
|
|
} ;; \
|
|
{ .mii ; \
|
|
add a = Z, b ; \
|
|
GETRW(DTmp, P, offset) ; \
|
|
mov P = W ; \
|
|
} ;;
|
|
|
|
#define FFLOOPU(a, b, c, d, M, P, N, s, offset) \
|
|
{ .mii ; \
|
|
(pMore) ld4 N = [DPtr], 4 ; \
|
|
add Z = M, TRound ; \
|
|
and Y = c, b ; \
|
|
} \
|
|
{ .mmi ; \
|
|
andcm X = d, b ;; \
|
|
add Z = Z, a ; \
|
|
or Y = Y, X ; \
|
|
} ;; \
|
|
{ .mii ; \
|
|
ld4 TRound = [TPtr], 4 ; \
|
|
(pMore) GETLW(W, P, offset) ; \
|
|
add Z = Z, Y ; \
|
|
} ;; \
|
|
{ .mii ; \
|
|
(pMore) or W = W, DTmp ; \
|
|
dep.z Y = Z, 32, 32 ;; \
|
|
shrp Z = Z, Y, 64 - s ; \
|
|
} ;; \
|
|
{ .mii ; \
|
|
add a = Z, b ; \
|
|
(pMore) GETRW(DTmp, P, offset) ; \
|
|
(pMore) mov P = W ; \
|
|
} \
|
|
{ .mib ; \
|
|
cmp.ne pMore, p0 = 0, LTrip ; \
|
|
add LTrip = -1, LTrip ; \
|
|
br.ctop.sptk.many .md5_FF_round##offset ; \
|
|
} ;;
|
|
|
|
#define MD5FBLOCK(offset) \
|
|
.type md5_digest_block##offset, @function ; \
|
|
\
|
|
.align 32 ; \
|
|
.proc md5_digest_block##offset ; \
|
|
.prologue ; \
|
|
.altrp QUICK_RTN ; \
|
|
.body ; \
|
|
md5_digest_block##offset: \
|
|
{ .mmi ; \
|
|
alloc PFS = ar.pfs, _NINPUTS, _NLOCALS, _NOUTPUT, _NROTATE ; \
|
|
mov LTrip = 2 ; \
|
|
mov ar.lc = 3 ; \
|
|
} ;; \
|
|
{ .mii ; \
|
|
cmp.eq pMore, p0 = r0, r0 ; \
|
|
mov ar.ec = 0 ; \
|
|
nop 0x0 ; \
|
|
} ;; \
|
|
\
|
|
.pred.rel "mutex", pLoad, pSkip ; \
|
|
.md5_FF_round##offset: \
|
|
FFLOADU(A, B, C, D, M12, M13, RotateM0, 7, offset) \
|
|
FFLOADU(D, A, B, C, M13, M14, RotateM1, 12, offset) \
|
|
FFLOADU(C, D, A, B, M14, M15, RotateM2, 17, offset) \
|
|
FFLOOPU(B, C, D, A, M15, RotateM0, RotateM3, 22, offset) \
|
|
\
|
|
{ .mib ; \
|
|
nop 0x0 ; \
|
|
nop 0x0 ; \
|
|
br.cond.sptk.many md5_digest_GHI ; \
|
|
} ;; \
|
|
.endp md5digestBlock ## offset
|
|
|
|
MD5FBLOCK(1)
|
|
MD5FBLOCK(2)
|
|
MD5FBLOCK(3)
|
|
|
|
.align 64
|
|
.type md5_constants, @object
|
|
md5_constants:
|
|
.md5_tbl_data_order: // To ensure little-endian data
|
|
// order, code as bytes.
|
|
data1 0x78, 0xa4, 0x6a, 0xd7 // 0
|
|
data1 0x56, 0xb7, 0xc7, 0xe8 // 1
|
|
data1 0xdb, 0x70, 0x20, 0x24 // 2
|
|
data1 0xee, 0xce, 0xbd, 0xc1 // 3
|
|
data1 0xaf, 0x0f, 0x7c, 0xf5 // 4
|
|
data1 0x2a, 0xc6, 0x87, 0x47 // 5
|
|
data1 0x13, 0x46, 0x30, 0xa8 // 6
|
|
data1 0x01, 0x95, 0x46, 0xfd // 7
|
|
data1 0xd8, 0x98, 0x80, 0x69 // 8
|
|
data1 0xaf, 0xf7, 0x44, 0x8b // 9
|
|
data1 0xb1, 0x5b, 0xff, 0xff // 10
|
|
data1 0xbe, 0xd7, 0x5c, 0x89 // 11
|
|
data1 0x22, 0x11, 0x90, 0x6b // 12
|
|
data1 0x93, 0x71, 0x98, 0xfd // 13
|
|
data1 0x8e, 0x43, 0x79, 0xa6 // 14
|
|
data1 0x21, 0x08, 0xb4, 0x49 // 15
|
|
data1 0x62, 0x25, 0x1e, 0xf6 // 16
|
|
data1 0x40, 0xb3, 0x40, 0xc0 // 17
|
|
data1 0x51, 0x5a, 0x5e, 0x26 // 18
|
|
data1 0xaa, 0xc7, 0xb6, 0xe9 // 19
|
|
data1 0x5d, 0x10, 0x2f, 0xd6 // 20
|
|
data1 0x53, 0x14, 0x44, 0x02 // 21
|
|
data1 0x81, 0xe6, 0xa1, 0xd8 // 22
|
|
data1 0xc8, 0xfb, 0xd3, 0xe7 // 23
|
|
data1 0xe6, 0xcd, 0xe1, 0x21 // 24
|
|
data1 0xd6, 0x07, 0x37, 0xc3 // 25
|
|
data1 0x87, 0x0d, 0xd5, 0xf4 // 26
|
|
data1 0xed, 0x14, 0x5a, 0x45 // 27
|
|
data1 0x05, 0xe9, 0xe3, 0xa9 // 28
|
|
data1 0xf8, 0xa3, 0xef, 0xfc // 29
|
|
data1 0xd9, 0x02, 0x6f, 0x67 // 30
|
|
data1 0x8a, 0x4c, 0x2a, 0x8d // 31
|
|
data1 0x42, 0x39, 0xfa, 0xff // 32
|
|
data1 0x81, 0xf6, 0x71, 0x87 // 33
|
|
data1 0x22, 0x61, 0x9d, 0x6d // 34
|
|
data1 0x0c, 0x38, 0xe5, 0xfd // 35
|
|
data1 0x44, 0xea, 0xbe, 0xa4 // 36
|
|
data1 0xa9, 0xcf, 0xde, 0x4b // 37
|
|
data1 0x60, 0x4b, 0xbb, 0xf6 // 38
|
|
data1 0x70, 0xbc, 0xbf, 0xbe // 39
|
|
data1 0xc6, 0x7e, 0x9b, 0x28 // 40
|
|
data1 0xfa, 0x27, 0xa1, 0xea // 41
|
|
data1 0x85, 0x30, 0xef, 0xd4 // 42
|
|
data1 0x05, 0x1d, 0x88, 0x04 // 43
|
|
data1 0x39, 0xd0, 0xd4, 0xd9 // 44
|
|
data1 0xe5, 0x99, 0xdb, 0xe6 // 45
|
|
data1 0xf8, 0x7c, 0xa2, 0x1f // 46
|
|
data1 0x65, 0x56, 0xac, 0xc4 // 47
|
|
data1 0x44, 0x22, 0x29, 0xf4 // 48
|
|
data1 0x97, 0xff, 0x2a, 0x43 // 49
|
|
data1 0xa7, 0x23, 0x94, 0xab // 50
|
|
data1 0x39, 0xa0, 0x93, 0xfc // 51
|
|
data1 0xc3, 0x59, 0x5b, 0x65 // 52
|
|
data1 0x92, 0xcc, 0x0c, 0x8f // 53
|
|
data1 0x7d, 0xf4, 0xef, 0xff // 54
|
|
data1 0xd1, 0x5d, 0x84, 0x85 // 55
|
|
data1 0x4f, 0x7e, 0xa8, 0x6f // 56
|
|
data1 0xe0, 0xe6, 0x2c, 0xfe // 57
|
|
data1 0x14, 0x43, 0x01, 0xa3 // 58
|
|
data1 0xa1, 0x11, 0x08, 0x4e // 59
|
|
data1 0x82, 0x7e, 0x53, 0xf7 // 60
|
|
data1 0x35, 0xf2, 0x3a, 0xbd // 61
|
|
data1 0xbb, 0xd2, 0xd7, 0x2a // 62
|
|
data1 0x91, 0xd3, 0x86, 0xeb // 63
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.md5_tbl_host_order: // OS data order, might as well
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// be little-endian.
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data4 0xd76aa478, 0xe8c7b756, 0x242070db, 0xc1bdceee // 0
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data4 0xf57c0faf, 0x4787c62a, 0xa8304613, 0xfd469501 // 4
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data4 0x698098d8, 0x8b44f7af, 0xffff5bb1, 0x895cd7be // 8
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data4 0x6b901122, 0xfd987193, 0xa679438e, 0x49b40821 // 12
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data4 0xf61e2562, 0xc040b340, 0x265e5a51, 0xe9b6c7aa // 16
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data4 0xd62f105d, 0x02441453, 0xd8a1e681, 0xe7d3fbc8 // 20
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data4 0x21e1cde6, 0xc33707d6, 0xf4d50d87, 0x455a14ed // 24
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data4 0xa9e3e905, 0xfcefa3f8, 0x676f02d9, 0x8d2a4c8a // 28
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data4 0xfffa3942, 0x8771f681, 0x6d9d6122, 0xfde5380c // 32
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data4 0xa4beea44, 0x4bdecfa9, 0xf6bb4b60, 0xbebfbc70 // 36
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data4 0x289b7ec6, 0xeaa127fa, 0xd4ef3085, 0x04881d05 // 40
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data4 0xd9d4d039, 0xe6db99e5, 0x1fa27cf8, 0xc4ac5665 // 44
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data4 0xf4292244, 0x432aff97, 0xab9423a7, 0xfc93a039 // 48
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data4 0x655b59c3, 0x8f0ccc92, 0xffeff47d, 0x85845dd1 // 52
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data4 0x6fa87e4f, 0xfe2ce6e0, 0xa3014314, 0x4e0811a1 // 56
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data4 0xf7537e82, 0xbd3af235, 0x2ad7d2bb, 0xeb86d391 // 60
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.size md5_constants#,64*4*2
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