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Changes from stable branch.

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This commit is contained in:
Dr. Stephen Henson 2008-09-15 22:45:13 +00:00
parent f97b8f3114
commit 7e994953c9
2 changed files with 6 additions and 6 deletions
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5
crypto/rc4/asm/rc4-ia64.S
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@ -75,14 +75,13 @@ yy=r31;
.skip 16 .skip 16
RC4: RC4:
.prologue .prologue
.fframe 0
.save ar.pfs,r2 .save ar.pfs,r2
.save ar.lc,r3
.save pr,prsave
{ .mii; alloc r2=ar.pfs,4,12,0,16 { .mii; alloc r2=ar.pfs,4,12,0,16
.save pr,prsave
mov prsave=pr mov prsave=pr
ADDP key=0,in0 };; ADDP key=0,in0 };;
{ .mib; cmp.eq p6,p0=0,in1 // len==0? { .mib; cmp.eq p6,p0=0,in1 // len==0?
.save ar.lc,r3
mov r3=ar.lc mov r3=ar.lc
(p6) br.ret.spnt.many b0 };; // emergency exit (p6) br.ret.spnt.many b0 };; // emergency exit

7
crypto/rc4/rc4_skey.c
View file

@ -128,11 +128,12 @@ void RC4_set_key(RC4_KEY *key, int len, const unsigned char *data)
* implementations suffer from significant performance * implementations suffer from significant performance
* losses then, e.g. PIII exhibits >2x deterioration, * losses then, e.g. PIII exhibits >2x deterioration,
* and so does Opteron. In order to assure optimal * and so does Opteron. In order to assure optimal
* all-round performance, let us [try to] detect P4 at * all-round performance, we detect P4 at run-time by
* run-time by checking upon HTT bit in CPU capability * checking upon reserved bit 20 in CPU capability
* vector and set up compressed key schedule, which is * vector and set up compressed key schedule, which is
* recognized by correspondingly updated assembler * recognized by correspondingly updated assembler
* module... * module... Bit 20 is set up by OPENSSL_ia32_cpuid.
*
* <appro@fy.chalmers.se> * <appro@fy.chalmers.se>
*/ */
#ifdef OPENSSL_FIPS #ifdef OPENSSL_FIPS